Digital-assisted direct-current offset cancellation circuit and digital control method thereof

A DC offset elimination circuit technology, applied to electrical components, transmission systems, etc., can solve the problems of large chip area, high-pass bandwidth of signals, and difficulty in compromising the response speed of the DC offset elimination loop, so as to eliminate DC offset and avoid large chip area. big effect

Pending Publication Date: 2021-08-10
思澈科技(上海)有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

All of these methods face the problems of large chip area required for the circuit and the difficulty in compromising the high-pass bandwidth of the signal and the response speed of the DC offset cancellation loop.

Method used

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  • Digital-assisted direct-current offset cancellation circuit and digital control method thereof
  • Digital-assisted direct-current offset cancellation circuit and digital control method thereof
  • Digital-assisted direct-current offset cancellation circuit and digital control method thereof

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Embodiment Construction

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0030] The present invention proposes a digital-assisted DC offset elimination circuit, including a variable gain amplifier, a comparator with a rail-to-rail input voltage range, a digital control module and an 11-bit digital-to-analog converter, and the electrical signal is input to the variable gain amplifier , a comparator with a rail-to-rail input voltage range samples the variable gain amplifier output differential voltage within a given time window, and r...

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Abstract

The invention relates to the field of integrated circuits, in particular to a digital-assisted direct-current offset cancellation circuit and a digital control method thereof. The direct-current offset cancellation circuit comprises a variable gain amplifier, a comparator with a rail-rail input voltage range, a digital control module and a 11-bit digital-to-analog converter, and an electric signal is input into the variable gain amplifier; a comparator with a rail-rail input voltage range samples differential voltage output by the variable gain amplifier in a given time window, polarity and corresponding times of the sampled differential voltage are recorded in a digital control module, the digital control module selects a direct current compensation mode according to recorded information and updates the differential voltage, the updated differential voltage is used as the input of a 11-bit digital-to-analog converter, and the output end of the 11-bit digital-to-analog converter is connected with the input end of a variable gain amplifier; and according to the invention, the direct-current offset of the receiver can be effectively eliminated.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a digital-assisted DC offset elimination circuit and a digital control method thereof. Background technique [0002] With the rapid development of wireless communication standards, for wireless transceiver chip systems, the zero-IF structure saves the off-chip filter compared with the superheterodyne structure, and the interface between the on-chip low-noise amplifier and the mixer does not need to be 50 ohm Matching makes it easier to optimize power consumption, noise and linearity. The overall receiver chip has the advantage of high integration, so it is more favored by modern wireless communication systems. [0003] However, the design of zero-IF receiver chips also has some unique problems and challenges. Among them, the DC offset problem caused by local oscillator leakage, mixer self-mixing or baseband circuit mismatch will make the baseband output of the receiver chip in ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/12
CPCH04B1/12
Inventor 龚正
Owner 思澈科技(上海)有限公司
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