Cache processing method and device for translation address
A cache processing and caching technology, applied in electrical digital data processing, memory systems, memory architecture access/allocation, etc., can solve the problems of limited space, limited number of address translation results, and no ATC management mechanism, so as to improve the hit rate. , the effect of improving utilization efficiency
Pending Publication Date: 2021-08-24
ALIBABA SINGAPORE HLDG PTE LTD
View PDF10 Cites 4 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
However, due to the limited space of ATC, the number of address translation results that it can store is limited, and the management mechanism for ATC is not specified in the existing ATS protocol, resulting in that ATC cannot adapt to the needs of equipment and retain useful address translation results to improve the access efficiency of the device
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0026] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.
[0027] According to the introduction of PCIe in the above-mentioned background technology, it can be seen that the address translation service ATS in the existing PCIe protocol only defines its use to obtain and store the address translation results obtained by the device through direct register access DMA, that is, the virtual address and the corresponding physical address The address pair formed. However, the management mechanism of the addre...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses a cache processing method and device for translation addresses, relates to the technical field of data caching, and mainly aims at improving the address access efficiency of PCIe equipment. According to the main technical scheme, a flag bit is arranged in an address translation entry of an address translation cache module, the address translation entry is used for storing a virtual address and a physical address which have a mapping relation, and the flag bit is used for storing label information for identifying the importance degree of the address translation entry; according to the virtual address written into a first register, the virtual address and a corresponding physical address are stored into the address translation entry, and a first label is marked in the corresponding flag bit; according to the virtual address accessed by a direct memory, a corresponding address translation entry is matched in the address translation cache module; and when the matching is not successful, the virtual address obtained by utilizing an address translation service and the corresponding physical address are stored into the address translation entry, and a second label is marked in the corresponding flag bit.
Description
technical field [0001] The invention relates to the technical field of data caching, in particular to a caching processing method and device for converting addresses. Background technique [0002] PCI-Express (peripheral component interconnect express, PCIe) is a high-speed serial computer expansion bus standard. PCIe belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission. The connected devices allocate exclusive channel bandwidth and do not share bus bandwidth. It mainly supports active power management, error reporting, end-to-end reliable transmission, hot swapping and quality of service ( QOS) and other functions. Its main advantage is the high data transmission rate, but also has considerable development potential. [0003] The PCIe protocol defines an address translation service (address translation service, ATS), which defines the method for the device side to obtain and cache the DMA address translation results and the message format b...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/1081G06F13/28G06F13/42
CPCG06F12/1081G06F13/28G06F13/4282G06F2212/1021G06F2213/0026Y02D10/00
Inventor 罗犇
Owner ALIBABA SINGAPORE HLDG PTE LTD