Shield gate field effect transistor and forming method thereof

Abstract

The invention provides a shield gate field effect transistor and a forming method thereof. When the isolation layer is prepared, the flatness of the top surface of a film layer before etching is realized by utilizing a sacrificial material layer with flowability under a preset condition, and the isolation layer with a flat surface is formed based on a subsequent etching process. Namely, according to the forming method provided by the invention, a grinding process can be not adopted when the isolating layer is prepared, so that defects caused by the grinding process can be effectively avoided, and reduction of the size of the device is facilitated.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a shielded gate field effect transistor and a forming method thereof. Background technique [0002] A shielded gate field effect transistor (Shielded Gate Trench, SGT) is more conducive to the flexible application of semiconductor integrated circuits because of its low gate-to-drain capacitance Cgd, very low on-resistance, and high withstand voltage performance. Specifically, in the shielded gate field effect transistor, by setting the shielding electrode below the gate electrode, the gate-to-drain capacitance can be greatly reduced, and the drift region of the shielded gate field effect transistor also has a relatively high impurity carrier Concentration, can provide additional benefits to the breakdown voltage of the device, which can reduce the on-resistance accordingly. [0003] Compared with other trench field effect transistors, although shielded gate field effect t...

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Problems solved by technology

[0010] The object of the present invention is to provide a method for forming a shielded gate field effect transistor to solve the adverse effects caused by the grinding process in the existing forming method

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