Method for forming film layer with uniform thickness distribution and semiconductor structure

A technology of thickness distribution and film layer, applied in semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., can solve problems such as uneven film thickness, breakdown, leakage, etc.
CN113380802APending Publication Date: 2021-09-10CHANGXIN MEMORY TECH INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Publication Date
2021-09-10

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Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a film layer with uniform thickness distribution and a semiconductor structure. The method for forming the film layer with uniform thickness distribution comprises the following steps of: providing a substrate, wherein the substrate is provided with an uneven surface for forming the film layer; forming a first sub-layer on the uneven surface at first temperature by using an in-situ vapor growth process; and forming a second sub-layer on the surface of the first sub-layer at second temperature by using an in-situ vapor growth process, wherein the film layer at least comprising the first sub-layer and the second sub-layer, and the second temperature being higher than the first temperature. The overall thickness distribution of the film layer generated on the uneven surface is uniform, the breakdown and electric leakage phenomena of the film layer are improved, and the electrical performance of the semiconductor structure is improved.
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Description

technical field

[0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a film layer with uniform thickness distribution and a semiconductor structure. Background technique

[0002] A dynamic random access memory (Dynamic Random Access Memory, DRAM) is a semiconductor structure commonly used in electronic devices such as computers, and is composed of a plurality of storage units, and each storage unit usually includes a transistor and a capacitor. The gate of the transistor is electrically connected to the word line, the source is electrically connected to the bit line, and the drain is electrically connected to the capacitor. The word line voltage on the word line can control the opening and closing of the transistor, so that the stored data can be read through the bit line. Data information in the capacitor, or write data information into the capacitor.

[0003] In the existing DRAM manufacturing process, t...

Claims

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