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Method of forming semiconductor device

A semiconductor and conductive technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc.

Pending Publication Date: 2021-09-21
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Thus, while existing CMOS devices (multi-gate devices in particular) and methods for fabricating such devices have generally been adequate for their intended purposes, they are not satisfactory in all respects.

Method used

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  • Method of forming semiconductor device
  • Method of forming semiconductor device
  • Method of forming semiconductor device

Examples

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Embodiment Construction

[0077] The following provides a number of different embodiments or examples for implementing different components of an embodiment of the disclosure. Specific examples of components and configurations are described below to simplify embodiments of the present disclosure. Of course, these are just examples and are not intended to limit the embodiments of the present disclosure. For example, the dimensions of the elements are not limited to the disclosed ranges or values, but may depend on process conditions and / or desired characteristics of the device. In addition, in the following description, it is mentioned that the first part is formed on or on the second part, which may include an embodiment in which the first part and the second part are formed in direct contact, and may also include an embodiment where the first part and the second part are formed. An embodiment in which an additional part is formed between the second part so that the first part and the second part may ...

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Abstract

A method of forming a semiconductor device includes providing a structure having a substrate, first and second channel layers on the substrate, and first and second gate dielectric layers on the first and second channel layers, respectively; forming a first dipole pattern on the first gate dielectric layer, the first dipole pattern having a first dipole material, the first dipole material having a first conductivity type; forming a second dipole pattern on the second gate dielectric layer, the second dipole pattern having a second dipole material having a second conductivity type opposite to the first conductivity type; and annealing the structure to drive elements of the first dipole pattern into the first gate dielectric layer and elements of the second dipole pattern into the second gate dielectric layer.

Description

technical field [0001] Embodiments of the present invention relate to a semiconductor device and its forming method, and in particular to a multi-gate device and its forming method. Background technique [0002] The electronics industry is increasingly demanding smaller and faster electronic devices that can simultaneously support a larger number of increasingly complex and complex functions. To meet these needs, the integrated circuit (IC) industry has a tendency to manufacture low cost, high performance, and low power consumption ICs. To date, these goals have been largely achieved by reducing IC size (eg, the smallest IC component size), thereby increasing production efficiency and reducing associated costs. However, this miniaturization also increases the complexity of the IC manufacturing process. Accordingly, similar advances in IC fabrication processes and technologies are required to achieve continued advances in IC devices and their performance. [0003] One area...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238H01L21/28
CPCH01L21/823807H01L21/823857H01L29/401H01L21/823821H01L27/0924H01L29/78696H01L29/42392H01L29/66439B82Y10/00H01L29/775H01L29/0673H01L29/513H01L29/41791H01L29/785H01L29/66795H01L29/26
Inventor 朱龙琨黄懋霖徐崇威余佳霓江国诚王志豪
Owner TAIWAN SEMICON MFG CO LTD
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