Microgrid secondary control clock synchronization method with delay robustness
A technology of secondary control and clock synchronization, applied in circuit devices, AC network circuits, single-network parallel feeding arrangements, etc. Addresses the effects of system performance degradation, good economy, and latency robustness
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[0072] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
[0073] Such as figure 1 As shown, a microgrid secondary control clock synchronization method with time-delay robustness is characterized in that the method includes the following steps:
[0074] Step A: Establish a local hardware clock model, and introduce a correction factor to obtain the corrected logic clock reading, on this basis, initialize the local state quantity information, and then enter step B;
[0075] Build a local hardware clock model:
[0076] τ i...
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