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Ultrahigh-voltage VDMOS integrated circuit chip and preparation method thereof

An integrated circuit and ultra-high voltage technology, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc., can solve the problems that the device's withstand voltage cannot meet the requirements, occupy the area of ​​the active area, waste the chip area, etc., and achieve saving Active area area, enhanced electric field line density, and the effect of improving device performance

Active Publication Date: 2021-12-17
捷捷微电(无锡)科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] 1. When the voltage level is high, the number of required field-limiting rings and the number of floating field plates increase, and the terminal area increases significantly, occupying a large amount of active area area, seriously wasting chip area, and high cost;
[0006] 2. If the terminal area is not increased (that is, the number of field-limiting rings and the number of floating field plates is not increased), when the avalanche test is performed, the withstand voltage capability of the device cannot meet the requirements, and the reliability is not up to standard

Method used

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  • Ultrahigh-voltage VDMOS integrated circuit chip and preparation method thereof
  • Ultrahigh-voltage VDMOS integrated circuit chip and preparation method thereof
  • Ultrahigh-voltage VDMOS integrated circuit chip and preparation method thereof

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Embodiment Construction

[0042] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0043] The invention provides an ultra-high voltage VDMOS integrated circuit chip and a preparation method thereof. The floating field plate is set to have at least three ends, the length of the floating field plate is increased, and the length of the floating field plate in the terminal protection area is optimized. To enhance the electric field dens...

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Abstract

The invention discloses an ultrahigh-voltage VDMOS integrated circuit chip and a preparation method thereof. The ultrahigh-voltage VDMOS integrated circuit chip comprises at least one floating field plate (9), the floating field plate (9) is provided with at least three ends. According to the VDMOS integrated circuit chip, the shape of the floating field plate (9) in a terminal protection area is optimized, the length of the floating field plate (9) is increased, the electric field density of the terminal protection area is enhanced, the withstand voltage of the terminal protection area is improved, and the reliability of the whole VDMOS integrated circuit chip is improved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit chip manufacturing, in particular to an ultra-high voltage VDMOS integrated circuit chip and a preparation method thereof. Background technique [0002] MOSFET (Metal Oxide Semiconductor Field Effect Transistor) devices have been used and developed for many years. The planar power MOS has the advantages of fast switching speed, small switching loss, high input impedance, voltage drive, high frequency, etc., as a power Switch tubes are widely used in various fields such as switching power supplies, automotive electronics, and motor drives. Reducing costs, improving withstand voltage, and enhancing product reliability have become the development direction of ultra-high voltage power MOS devices. [0003] The planar power MOS includes the active area and the terminal protection area located on the periphery of the active area. For ultra-high voltage planar MOS, the performance of the ...

Claims

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Application Information

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IPC IPC(8): H01L29/40H01L29/78H01L21/336
CPCH01L29/402H01L29/404H01L29/7802H01L29/66712
Inventor 刘秀梅刘锋殷允超周祥瑞
Owner 捷捷微电(无锡)科技有限公司
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