A power chip packaging method

Abstract

This application belongs to the technical field of semiconductor packaging, and specifically discloses a power type chip packaging method, including: configuring a packaging base; configuring a protective case; thermally bonding the packaging base and the protective case; Two vertical axes are drawn in the center to divide the substrate into four areas, one area is the low heat generation element area, and the two adjacent areas are the high heat generation high heat resistance element area and the high heat generation low heat resistance element area The configuration of the protective shell includes: forming a relatively thin concentrated outer conduction area in the middle of the protective shell, and the direct guide area extends from the high-yield and high-resistance area to the concentrated outer conduction area; a ring-shaped and The thickness of the ring guide area is relatively thin; before the package base plate and the protective shell are thermally bonded and formed, the power chip is fixed on the substrate, and the package base plate and the protective shell are thermally bonded and formed. The structure of the package is reserved to ensure the safety of the power chip package and to have an excellent heat dissipation effect.

Description

technical field [0001] The present application relates to semiconductor packaging, in particular to a method for packaging power chips. Background technique [0002] The packaging method and related packaging structure of power chips are relatively solid in the prior art. For example, there are representative technical contents in relevant patent documents. Chinese invention patent CN200910032590.5 discloses packaging for high-power chips Method, the core of this technology is to punch a hole slightly smaller than the copper base on the metal substrate, embed the copper base into the metal substrate, print solder paste on the copper base and the metal substrate, and install the chip and the lead pins on the copper base and the copper base respectively. On the metal substrate, put the chip, lead pin, copper base and metal substrate together in a sintering furnace for sintering at a temperature of 210°C to 230°C. The chip and the lead pin are bonded with wires, and check under...

AI Technical Summary

Problems solved by technology

[0003] In this technology, the chip is exposed on the substrate, which is actually more conducive to heat dissipation, but the packaging method or structure of this technical framework also has many disadvantages. For example, this packaging also requires a package. In fact, the package It is a safety protection cover, which can solve some safety protection problems, but this kind of enclosure may greatly reduce the effect of heat dissipation, because the enclosure is closed, so it is not conducive to heat dissipation; so now there is a lack of a technology that can retain Encapsulate this structure to ensure safety, and can also have a significant heat dissipation effect packaging technology

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