Three-dimensional board-level fan-out type packaging structure and manufacturing method thereof

Abstract

The invention discloses a three-dimensional board-level fan-out type packaging structure and a manufacturing method thereof. The manufacturing method comprises the steps of respectively bonding copper foils on the front surface and the back surface of a carrier piece, and forming a composite carrier plate; manufacturing a conductive structure on the composite carrier plate; manufacturing conductive salient points on a bonding pad of a chip I; mounting the chip I on the composite carrier plate; forming a plastic package layer wrapping the conductive structure and the chip I on the composite carrier plate; respectively manufacturing a rewiring layer and an insulating dielectric layer on the surface of the plastic package layer; removing the carrier piece to obtain a packaged semi-finished product structure; respectively manufacturing a rewiring layer and an insulating dielectric layer on the back surface of the chip I for packaging the semi-finished product structure; manufacturing a signal leading-out structure and an electric connection structure on the packaged semi-finished product structure; and inversely mounting a chip II on the electric connection structure, and wrapping the chip II with an outer plastic package protection layer to obtain the three-dimensional board-level fan-out type packaging structure. According to the invention, the warping problem caused by processing can be effectively improved, multifunctional integration can be realized, and the processing cost can be reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip packaging, in particular to a three-dimensional board-level fan-out packaging structure and a manufacturing method thereof. Background technique [0002] With the increasingly stringent requirements for portable and multi-functional consumer electronic products, integrating more functions, improving product performance, thinning and reducing manufacturing costs have gradually become the development direction of intelligent terminal products and industry manufacturers. As a kind of wafer-level packaging, the fan-out packaging structure greatly increases the number of package I / Os, which is in line with the development direction of multi-functional chips. However, due to its high processing cost, it is not suitable for large-scale production has certain obstacles. [0003] Therefore, it is necessary to propose a device that can accommodate more I / Os, reduce chip size and thickness, integ...

AI Technical Summary

Problems solved by technology

The existing packaging structure has high processing costs and cannot meet the multi-functional and other application requ

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