Trench metal oxide semiconductor transistor device and manufacturing method thereof
A metal-oxide-semiconductor and transistor technology, which is applied in the field of trench metal-oxide-semiconductor transistors and its manufacturing, can solve the problems of increasing parasitic capacitance and affecting the switching speed of trench metal-oxide-semiconductor transistors, so as to reduce parasitic capacitance and increase design Flexibility, Effect of Reducing Gate-Source Capacitance
Pending Publication Date: 2022-02-22
UPI SEMICON CORP
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Problems solved by technology
Shading the overlapping area between the gate and the gate electrode will lead to an increase in the parasitic capacitance (Cgs) of the trench MOS transistor device, which in turn affects the switching speed of the trench MOS transistor device
Method used
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[0022] The present invention will be described more fully with reference to the accompanying drawings of this embodiment. However, the present invention can also be embodied in various forms and should not be limited to the embodiments described herein. In the drawings, the thicknesses of layers and regions may be exaggerated for clarity. The same or similar symbols represent the same or similar devices, and the following paragraphs will not repeat them one by one.
[0023] Figure 1A to Figure 1J It is a schematic cross-sectional view of a method for manufacturing a trench metal-oxide-semiconductor transistor device according to an embodiment of the present invention.
[0024] Please refer to Figure 1A , providing a substrate 100 . In an embodiment, the substrate 100 is a semiconductor substrate with a first conductivity type, such as an N-type heavily doped silicon substrate.
[0025] Next, an epitaxial layer 102 is formed on the substrate 100 . In one embodiment, the ...
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The invention provides a trench metal oxide semiconductor transistor device and a manufacturing method thereof. The trench metal-oxide-semiconductor transistor device includes a substrate and a gate structure. The substrate has a trench. The gate structure is disposed in the trench. The gate structure includes a lower electrode, a first upper electrode, a second upper electrode, a first dielectric layer, and a second dielectric layer. The lower electrode has a first width. The first upper electrode and the second upper electrode are disposed on both sides of the trench, respectively, and a second width is provided between the first upper electrode and the second upper electrode. The first upper electrode and the second upper electrode are each provided with an arc-shaped bottom face. The first dielectric layer is disposed on the lower electrode to separate the lower electrode from the first upper electrode and the second upper electrode. The second dielectric layer is disposed on the first dielectric layer between the first upper electrode and the second upper electrode and extends to cover a top surface of the first upper electrode and a top surface of the second upper electrode.
Description
technical field [0001] The invention relates to a power semiconductor device and a manufacturing method thereof, in particular to a trench metal oxide semiconductor transistor device and a manufacturing method thereof. Background technique [0002] Power semiconductor devices have been widely used in the field of power management. An ideal power semiconductor device must have the characteristics of low parasitic capacitance (parasitic capacitance), so as to ensure the response speed of the power semiconductor device and provide good power conversion efficiency. [0003] A trench metal-oxide-semiconductor transistor device with a shielded gate is a common power semiconductor device at present. In a conventional structure, a trench metal-oxide-semiconductor transistor device with a shielded gate includes a shielded gate and a gate electrode on the shielded gate. Shading the overlapping region between the gate and the gate electrode will lead to an increase in the parasitic ca...
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IPC IPC(8): H01L29/06H01L29/423H01L29/78
CPCH01L29/0603H01L29/0684H01L29/4236H01L29/78H01L29/7813H01L29/407
Inventor 蔡依芸洪章响
Owner UPI SEMICON CORP