Single event upset fault simulation system and method and storage medium

A single-event flip and fault simulation technology, applied in the aerospace field, can solve the problems of reducing data processing and transmission reliability, increasing resource waste, etc., to save on-board resources, increase reliability, and high practicability.

Pending Publication Date: 2022-02-25
WUHAN INSTITUTE OF TECHNOLOGY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, since the overall resources of the entire processing system are limited, performing TMR on all modules not only reduces the reliability of data processing and transmission, but also increases unnecessary waste of board resources

Method used

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  • Single event upset fault simulation system and method and storage medium
  • Single event upset fault simulation system and method and storage medium
  • Single event upset fault simulation system and method and storage medium

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Embodiment Construction

[0025] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0026] figure 1 A block diagram of a single event upset fault simulation system provided by an embodiment of the present invention.

[0027] like figure 1 As shown, a single event upset fault simulation system includes a host computer and a lower computer;

[0028] The upper computer is used to import original data, flipping configuration information and flag bit information, and encode and analyze the original data and the flipping configuration information according to the flag bit information to obtain coding information, and convert the coding information to sent to the lower computer;

[0029] The lower computer is used to receive the encoded information, and decode and analyze the encoded information to obt...

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Abstract

The invention provides a single event upset fault simulation system and method and a storage medium, and the system comprises an upper computer and a lower computer, the upper computer is used for importing original data, upset configuration information and flag bit information, carrying out the coding analysis of the original data and the upset configuration information according to the flag bit information, obtaining coding information, and sending the coding information to the lower computer, and the lower computer is used for receiving the coding information, decoding and analyzing the coding information to obtain decoding data, simulating single event upset faults of the decoding data through the constructed simulation fault upset circuit to obtain simulated data, calculating the error rate between the decoding data and the simulated data, and taking the simulated data and the bit error rate as simulation results. According to the system, on-board resources of a processing system can be saved, the reliability of data processing and transmission is also improved, the system has very high practicability for a test circuit occupying a large proportion of on-board resources, and a guiding significance is provided for realizing a test method for simulating single event upset.

Description

technical field [0001] The invention mainly relates to the field of aerospace technology, and in particular to a single event flipping fault simulation system, method and storage medium. Background technique [0002] When the lower computer processing system realizes data information processing and transmission, the impact of single particles or heavy ions in the space on semiconductor materials can easily cause the data in its internal registers to flip, thus affecting the internal operating logic of the processing system and even the overall failure of the processing system. The single event upset (Single Event Upset, SEU) has a particularly obvious impact on the processing system. SEU refers to the inversion of the logical state caused by space high-energy particles bombarding the memory circuit or functional circuit on the chip. The SEU failure of the configuration storage area will lead to changes in the structure of the functional circuit, which is permanent without c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/26
CPCG06F11/261
Inventor 王振王科周论于航洪柱肖志康
Owner WUHAN INSTITUTE OF TECHNOLOGY
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