Method and device for self-adaptive determination of integrated circuit layout pads and isolation pads

Abstract

This application proposes a method and device for self-adaptive determination of integrated circuit layout pads and isolation pads, which belong to the field of integrated circuit design. The method includes: for each pad in the integrated circuit layout design file, search for the location where the center of the pad is located Layout polygon; determine the type of layout polygon, if the layout polygon is a copper-clad polygon, then use the first rule to determine the size of the pad and the size of the isolation pad corresponding to the pad; if the layout polygon is an insulating polygon, then use the second rule Determine the size of the pad and the size of the isolation spacer corresponding to the pad. The device includes: an integrated circuit layout reading module, a network acquisition module, a minimum distance calculation module, a polygon type judgment module, a first rule module, and a second rule module; the application accurately determines the pads and isolation of the integrated circuit layout The size of the gasket can automatically correct the contradictory redundant design, and quickly and accurately improve the design defects of VLSI.

Description

technical field [0001] The application belongs to the field of integrated circuit design, and in particular relates to a method and device for self-adaptive determination of integrated circuit layout pads and isolation pads. Background technique [0002] With the development of communication technology, the research and development of VLSI has gradually started. In order to improve the performance of electronic equipment, reduce the size and reduce the cost, transistors, other components and circuits are integrated on a small semiconductor substrate. In order to achieve more functions, VLSI has a structure of several to hundreds of layers, each layer structure is extremely complex, integrating tens of millions or even hundreds of millions of transistors, and the integrated circuit layers are connected by vias. On the one hand, as the components of the integrated circuit become denser, the available space for the vias connecting the integrated circuit is getting smaller and ...

AI Technical Summary

Problems solved by technology

This redundant design is reflected in that, on the one hand, when the vias on this non-same network pass through the copper clad layer, an isolation pad larger than the pad will be added to the copper clad layer. On the other hand, the engineer A hole will also be added in advance at the position where the via hole of the copper clad layer passes through. This hole is larger than the size of the via pad, and the engineer who performs these two redundant settings may not be the same

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