Rotary transformer decoding and error compensation system and method based on FPGA

Abstract

The invention provides a rotary transformer decoding and error compensation system based on an FPGA, and relates to the field of rotary transformers. The FPGA-based rotary transformer decoding and error compensation system comprises an FPGA processor, a low-pass filter, a power amplifier, a rotary transformer, an AD converter and a Hall sensor, the FPGA processor is electrically connected with the rotary transformer through the low-pass filter and the power amplifier in sequence; the rotary transformer is used for acquiring a sine analog voltage signal and a cosine analog voltage signal of an orthogonal winding in the motor; the rotary transformer is electrically connected with the FPGA processor through the AD converter; the Hall sensor is electrically connected with the FPGA processor, and is used for detecting a first number of rotation turns of a rotor of the motor; the invention further provides a rotary transformer decoding and error compensation method based on the FPGA, the detection precision of the rotary transformer on the rotation angle of the motor can be improved, meanwhile, the deviation of the rotation angle of the motor caused by error accumulation is corrected, and accurate measurement and calculation of the rotation angle of the motor are achieved.

Description

technical field [0001] The invention relates to the field of rotary transformers, in particular to an FPGA-based rotary transformer decoding and error compensation system and method. Background technique [0002] Due to its high measurement accuracy, fast dynamic response, low cost, and easy maintenance, resolvers are widely used as position sensors in the field of motor control. The real-time detection of the motor position involves a large number of function calculations and coordinate transformations, requiring a large number of complex calculations in a short period of time. For the decoding algorithm, foreign companies have launched special decoding chips to improve computing efficiency, such as the AD2S12 series chips launched by American AD Company. Although dedicated chips can meet computing needs, they are expensive and have poor versatility. [0003] With the improvement of modern chip technology, the equivalent system gate of FPGA has reached several million gat...

AI Technical Summary

Problems solved by technology

Due to the limitations of the decoding algorithm, the accumulation of decoding errors will lead to data errors. Therefore, for the problem of error accumulation, it is necessary to have a means of detecting errors and compensating them.

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