Wafer die exposure field arrangement method, wafer preparation method and wafer

Abstract

The invention relates to a wafer tube core exposure field arrangement method, a wafer preparation method and a wafer, and the method specifically comprises the following steps: firstly forming a first exposure arrangement region and second exposure arrangement regions, and then determining at least one end part of any second exposure arrangement region in a first direction; when a non-overlapping area exists between the die exposure field and the edge of the wafer, the target movement amount and the target movement direction of the corresponding second exposure arrangement area are determined, and the non-overlapping area formed at the edge of the wafer is covered by adopting the dislocation movement mode, so that the overlapping area of the die exposure field and the wafer is increased, and the yield of the die exposure field is improved. The number of the tube cores on a single wafer is increased, the effective area of the wafer is fully utilized, and the yield of the tube cores on the single wafer is increased; in addition, the die array in the first die exposure field and the die array in the moved second die exposure field are aligned, so that the die is prevented from being scratched when the wafer is cut.

Description

technical field [0001] The present application relates to the technical field of chip manufacturing, and in particular to a method for arranging exposure fields of wafer dies, a method for preparing a wafer, and the wafer. Background technique [0002] At present, the die lithography process uses a UT lithography machine to perform step-by-step exposure on the wafer, and then lithographically etches fine structures onto the wafer. A stepping unit is a die exposure field, and a plurality of dies are arranged in a matrix in each die exposure field. Through each step, the exposure field of a single die is arranged to fill the entire wafer, thereby realizing that the entire wafer is covered with dies. [0003] However, currently, due to the small overlapping area of ​​the exposure field between the wafer and the die, the overlapping area at the edge of the wafer is not covered, resulting in a small number of dies in the wafer, which in turn leads to a low effective utilization ...

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Problems solved by technology

[0003] However, currently, due to the small overlapping area of ​​the exposure field between the wafer and the die, the overlapping area at the edge of the wafer is not covered, resulting in a small number of die arrangements in the wafer, which in turn leads to a low effective utilization of the wafer

If the arrangement relationship between the die exposure field and the wafer is changed arbitrarily, and the overlapping area at the edge of the wafer is covered as much as possible, it will inevitably cause damage to the dies covered with the wafer when the wafer is subsequently cut. scratches, greatly increasing the number of scrapped die

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