Hardware architecture applied to Fastform neural network and calculation method thereof

A hardware architecture and neural network technology, applied in the field of neural networks, can solve problems such as Fastformer neural network development hardware architecture, and achieve the effect of improving computing speed and efficiency

Pending Publication Date: 2022-04-12
南京风兴科技有限公司
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, the Fastformer network model is calculated on a general-purpose computing platform such as CPU or GPU, and no dedicated hardware architecture has been developed for the Fastformer neural network.

Method used

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  • Hardware architecture applied to Fastform neural network and calculation method thereof
  • Hardware architecture applied to Fastform neural network and calculation method thereof
  • Hardware architecture applied to Fastform neural network and calculation method thereof

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Embodiment Construction

[0100] In order to facilitate the description of the technical solution of the application, some concepts involved in the application are firstly described below. In this application, the operation of multiplying corresponding elements in a vector or a matrix one by one is called an element-by-element product operation. As an example, the element-wise product operation process of two 2-dimensional row vectors can be expressed by the following formula:

[0101] (A1 A2)*(B1 B2)=(A1×B1 A2×B2)

[0102] First, the reasoning process of the Fastformer neural network is further explained. figure 1 It is a schematic diagram of the model architecture of the Fastformer neural network. like figure 1 As shown, the input of the Fastformer model is a matrix E with d rows and N columns, which can be regarded as a d-dimensional column vector e 1 , e 2 ,...,e N-1 , e N It is combined, where d represents the "hidden layer dimension" of the neural network (called hidden dimension in Englis...

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Abstract

The invention discloses a hardware architecture applied to a Fastform neural network and a calculation method of the hardware architecture. The hardware architecture comprises a data storage module, a reading buffer module, a writing buffer module, a calculation module and a control module; wherein the control module is used for controlling the hardware architecture to execute calculation operation, and the calculation module comprises a linear calculation sub-module, a nonlinear calculation sub-module and an intermediate storage sub-module; the linear calculation module comprises a plurality of vector calculation units and is used for executing linear operation including vector matrix multiplication, matrix addition and element-by-element product, and the nonlinear submodule is used for executing normalized exponential function operation. According to the hardware architecture and the computing method thereof, the computing speed and efficiency of the Fastform neural network can be effectively improved.

Description

technical field [0001] This application relates to the technical field of neural networks, in particular to the hardware architecture and calculation method applied to the Fastformer neural network. Background technique [0002] The Fastformer network is a neural network model designed for natural language processing tasks. Its model architecture is as follows: figure 1 shown. The Fastformer network uses an additive attention mechanism to build up contextual information with linear complexity. [0003] The number of rows of the input matrix Input of the Fastforemer network represents the hidden layer dimension (hidden dimension) of the network, and the number of columns represents the length of the input sequence. Among them, the hidden layer dimension of the network is generally 256, and the length of the input sequence is 128-65536, specifically by different The input length of the task processing text is determined; in general, the length of the input sequence is greate...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063G06F17/16G06F17/15
Inventor 路思远王中风
Owner 南京风兴科技有限公司
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