Acceleration method and device based on ATE equipment chip test and test machine system

A device chip and acceleration device technology, applied in the field of integrated circuit testing, can solve the problems of low test efficiency, high time cost, and long test time, so as to improve chip test efficiency, chip test acceleration, reduce configuration time and read the effect of time

Active Publication Date: 2022-04-15
杭州加速科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional chip test scheme takes a long time to test, and the test efficiency is low, and it takes a lot of time and cost

Method used

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  • Acceleration method and device based on ATE equipment chip test and test machine system
  • Acceleration method and device based on ATE equipment chip test and test machine system
  • Acceleration method and device based on ATE equipment chip test and test machine system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0064] Embodiment 1 of the present invention discloses an acceleration method based on chip testing of ATE equipment, the method flow is shown in the attached figure 2 As shown, the specific scheme is as follows:

[0065] An acceleration method based on chip testing of ATE equipment provided in this embodiment is applied to ATE equipment. The ATE equipment includes a main control board, a backplane, and a service board, and the main control board is connected to multiple service boards through the backplane. The main control board is equipped with a test program, and each service board is equipped with an FPGA and a plurality of pin circuit chips.

[0066] A kind of acceleration method based on ATE equipment chip test, method comprises as follows:

[0067] 101. Select the pin circuit chips to be configured on each service board, and the FPGA configures multiple pin circuit chips at the same time according to the instructions of the test program;

[0068] 102. The pin circui...

Embodiment 2

[0090] Embodiment 2 of the present invention discloses an acceleration device based on ATE equipment chip testing, which systematizes the acceleration method in Embodiment 1. The specific structure of the acceleration device is shown in the attached Figure 5 As shown, the specific scheme is as follows:

[0091] An acceleration device based on chip testing of ATE equipment is applied in ATE equipment. The ATE equipment includes a main control board, a backplane and a service board. The main control board is equipped with a test program, and each service board is equipped with FPGA and multiple pin circuit chip;

[0092] Accelerators include the following,

[0093] Chip configuration unit 1: used to select the pin circuit chip to be configured on each service board, so that the FPGA can simultaneously configure the pin circuit chip according to the instructions of the test program;

[0094] Data acquisition unit 2: used to collect the test data fed back by the chip to be tes...

Embodiment 3

[0104] The embodiment of the present invention provides an ATE testing machine system, the structure of which is shown in the appended image 3 And attached Figure 4 As shown, the specific scheme is as follows:

[0105] An ATE testing machine system, the ATE equipment includes a main control board, a backboard and a service board, the main control board is configured with a test program, and each service board is configured with an FPGA and a plurality of pin circuit chips;

[0106] The FPGA on each service board is equipped with PE selection registers, PE configuration registers, PE interfaces, and PE reading control modules;

[0107] The PE selection register is used to select the pin circuit chip to be configured on the service board;

[0108] The PE configuration register is used to configure the pin circuit chip selected by the PE selection register on the service board;

[0109] The PE interface is used to receive instructions about configuring the PE chip sent by th...

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Abstract

The invention provides an acceleration method and device based on ATE equipment chip testing and a testing machine system. The acceleration method comprises the following steps: selecting and configuring a pin circuit chip; the pin circuit chip collects test data fed back by the chip to be tested; at a preset time interval, the FPGA on each service board reads the test data in all the pin circuit chips on the service board in parallel, and stores the read test data in the FPGA; the test program obtains test data of all pin circuit chips on the service board by reading data stored in the FPGA on each service board; and the test program analyzes the test data to complete the test of the to-be-tested chip. According to the scheme provided by the invention, by reducing the access times of the test program to the pin circuit chip in the chip test process of the ATE equipment, the configuration time and reading time of the chip are reduced, the chip test time is shortened, the chip test efficiency is improved, hardware adjustment is not needed, and only the FPGA on the service board needs to be designed and upgraded.

Description

technical field [0001] The invention relates to the field of integrated circuit testing, in particular to an acceleration method, device and testing machine system based on chip testing of ATE equipment. Background technique [0002] ATE (Automatic Test Equipment) is an automatic test equipment. It is a collection of test instruments controlled by a high-performance computer. It is a test system composed of a tester and a computer. The computer controls the test by running the instructions of the test program. hardware. The semiconductor chip testing machine is used to test the integrity of the function and performance of integrated circuits, and is an important equipment to ensure the quality of integrated circuits in the production process of integrated circuits. The most basic requirement of the test system is to guarantee the rapidity, reliability and stability of the test function. Among them, rapidity is particularly important. How to improve the testing speed of chi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40G01R31/28
CPCY02D10/00
Inventor 邬刚凌云
Owner 杭州加速科技有限公司
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