Random instruction generation environment based on novel processor architecture

Abstract

The invention relates to the technical field of integrated circuit processor design verification, in particular to a random instruction generation environment based on a novel processor architecture, which utilizes a UVM and SystemVerilog verification technology and mainly comprises a transaction module for coding all instructions of the novel processor architecture, a random instruction generation module for generating a random instruction, a random instruction generation module for generating a random instruction, a random instruction generation module for generating a random instruction, and a random instruction generation module for generating a random instruction, in an instruction generation process, a constraint sequence module, a test module, a memory module, a module, a parameter module and a sim simulation module are added, wherein the test module is used for defining an execution sequence; the memory module is used for realizing read-write of a memory unit; the module is used for realizing automatic comparison; the random instruction generation environment based on the novel processor architecture is high in modularity, good in reusability, high in instruction generation speed, wide in applied function scene, high in reliability and capable of meeting the requirement for verification of modern large-scale processor instruction sets.

Description

technical field [0001] The invention relates to the technical field of integrated circuit processor design verification, in particular to a random instruction generation environment based on a novel processor architecture. Background technique [0002] With the increasing design scale of processors and the increasing complexity of the structure, the functional verification of processors is becoming more and more difficult. The traditional directional test incentives can no longer meet the current research and development needs. The use of random verification can generate a large number of random test vectors in a short period of time, which helps to quickly capture corner cases that are not expected by manual directional testing, and can save a lot of time and labor costs. This is of great significance in the field of modern microprocessor verification. very important role. Most of the existing random instruction generation environments have poor reusability and can only be...

AI Technical Summary

Problems solved by technology

Most of these traditional random instruction generation environments have single-function scenarios and poor reusability

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