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Semiconductor device and forming method thereof

A semiconductor and gate dielectric layer technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc.

Pending Publication Date: 2022-05-06
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Such scaling down has created the challenge of improving the performance of semiconductor devices

Method used

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  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof

Examples

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Embodiment Construction

[0048] The following disclosure provides many different embodiments, or examples, for practicing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are examples only and are not meant to be limiting. For example, in the following descriptions, forming a first feature above a second feature may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include forming additional features on the first feature and the second feature Between the embodiments, the first feature and the second feature may not be in direct contact. As used herein, forming a first feature on a second feature means forming the first feature in direct contact with the second feature. In addition, in various instances, the present disclosure may repeat element symbols and / or letters. This repetition does not necessarily imply a...

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Abstract

A semiconductor device and a method of forming the same are described. A method of forming a semiconductor device having a controlled doping gate dielectric layer includes forming a gate dielectric layer over a fin structure, forming a diffusion barrier layer over the gate dielectric layer, and forming a dopant source layer over the diffusion barrier layer. The gate dielectric layer includes an interface layer on the fin structure and a high-k dielectric layer on the interface layer. The dopant of the dopant source layer diffuses into the gate dielectric layer. The method further includes doping a portion of the interface layer with a dopant and removing the dopant source layer.

Description

technical field [0001] The present disclosure relates to a semiconductor device and a method of forming the same, and more particularly to a semiconductor device with a controlled doped gate dielectric layer and a method of forming the same. Background technique [0002] With the progress of semiconductor technology, the demand for higher storage capacity, faster processing system, higher performance and lower cost has gradually increased. To meet these demands, the semiconductor industry continues to shrink the size of semiconductor devices, such as MOSFETs including planar MOSFETs and FinFETs. Such downsizing has created the challenge of improving the performance of semiconductor devices. Contents of the invention [0003] An embodiment of the present disclosure discloses a method, which includes forming a gate dielectric layer on the fin structure, forming a diffusion barrier layer on the gate dielectric layer, forming a dopant source layer on the diffusion barrier lay...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8234H01L21/8238H01L27/088H01L27/092
CPCH01L21/823431H01L21/823462H01L21/823821H01L21/823857H01L27/0886H01L27/0924H01L29/66545H01L29/517H01L29/513H01L21/28185H01L29/7848H01L29/165H01L29/267H01L29/66795H01L21/3115H01L29/42392H01L29/785H01L29/42364
Inventor 摩尔·沙哈吉·B萨万特·钱德拉谢卡尔·普拉卡斯
Owner TAIWAN SEMICON MFG CO LTD