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Chip testing system and control method of chip testing system

A technology for chip testing and control methods, applied in electronic circuit testing, measuring electricity, measuring devices, etc., can solve the problems of long testing process, unintuitiveness, and inability to unify the functional design process, so as to improve the testing speed and testing accuracy. Effect

Pending Publication Date: 2022-05-20
AXERA SEMICON (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Relevant testing techniques cannot be unified with the functional design process, and the testing process takes a long time and is not intuitive

Method used

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  • Chip testing system and control method of chip testing system
  • Chip testing system and control method of chip testing system
  • Chip testing system and control method of chip testing system

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Embodiment Construction

[0030] Embodiments of the present application are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary, and are intended to explain the present application, and should not be construed as limiting the present application.

[0031] The chip testing system and the control method of the chip testing system according to the embodiments of the present application will be described below with reference to the accompanying drawings.

[0032] figure 1 It is a schematic structural diagram of a chip testing system according to an embodiment of the present application.

[0033] Such as figure 1 As shown, the chip testing system 100 of the embodiment of the present application may include: a chip 110 and a testing machine 120 , and the chip 110 is connec...

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Abstract

The invention provides a chip test system and a control method of the chip test system, the chip test system comprises a chip and a test machine, the chip comprises a controller, a pin, a data selector and a test register; the controller is used for receiving a mode switching instruction sent by the test machine and controlling the data selector to be switched to the test mode according to the mode switching instruction; the data selector is used for controlling the first input end of the data selector to be conducted with the output end of the data selector when the data selector is switched to the test mode; the controller is also used for receiving a test instruction sent by the test machine and controlling the test register to output a test value according to the test instruction; and the test machine is used for collecting the voltage output by the second end of the pin and generating a test result of the first end of the pin according to the voltage and the test instruction. Therefore, the pins of the chip can be tested, the test logic can be introduced in the chip design stage, and the test speed and the test accuracy are improved.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, in particular to a chip testing system and a control method for the chip testing system. Background technique [0002] The pins of the chip are the devices connected between the chip and the outside, and are used for data input and output. Among them, the input and output are input low level, input high level, output low level, and output high level. There are certain standards for judging high and low levels. If it is lower than a specific level value (for example: 0.3V), it can be considered as a low level; if it is higher than a specific level value (for example: 1.5V), it can be considered as a high level. flat. [0003] Since the chip has a large number of pins, and each pin is used for communication between the chip and the outside, the reliability of the pins is particularly important. Relevant testing techniques cannot be unified with the functional design process,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2856G01R31/2894
Inventor 田健飞王远唐平
Owner AXERA SEMICON (SHANGHAI) CO LTD
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