Compiler design implementation method based on risc-v

Abstract

The invention relates to the technical field of compiler design, and discloses a risc-v-oriented compiler design implementation method, which comprises the steps of designing and constructing a PE calculation unit which comprises a floating-point number quantization unit, a product accumulation unit and a register; constructing a two-dimensional systolic array based on a PE calculation unit; expanding the constructed two-dimensional systolic array, and taking the expanded two-dimensional systolic array as a compiling calculation module of a compiler; and the compiler receives original data and a compiling operation instruction, and performs calculation and storage of the data by utilizing a compiling calculation module. According to the method, design and construction of the compiler are achieved based on the risc-v instruction set, the designed compiler can achieve parameter calculation of the neural network based on the multiple PE calculation units, the designed compiler quantifies the calculation result in real time, the compiling calculation speed is increased, and the calculation efficiency is improved. And the compilation calculation module based on the double-cache mechanism can improve the throughput of the calculation equipment and reduce the idle time of the PE calculation unit.

Description

technical field [0001] The invention relates to the technical field of compiler design, in particular to a risc-v-oriented compiler design and implementation method. Background technique [0002] High performance, low power consumption, and high reliability have become the development trend of compilers. On the one hand, high performance is always the main research direction of compiler design; on the other hand, low power consumption and high reliability design methods will cause a certain performance loss to the compiler. How to achieve low power consumption and high Reliable design has also become a key issue in compiler design. [0003] At the same time, as deep learning technology has entered and began to affect people's lives, mobile terminals, embedded systems, single-chip microcomputers, and various AI accelerators are all important hardware platforms for deep learning applications. Different platforms usually have different functions and features. It is very diffi...

AI Technical Summary

Problems solved by technology

On the one hand, high performance is always the main research direction of compiler design; on the other hand, low power consumption and high reliability design methods will cause a certain performance loss to the compiler. How to achieve low power consumption and high Reliable design has also become a key issue in compiler design

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