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Wafer-level chip packaging process

A wafer-level chip and packaging process technology, applied in the direction of replication/marking method, temperature recording method, semiconductor/solid-state device testing/measurement, etc. The effect of reducing cracking and eliminating air bubbles

Pending Publication Date: 2022-05-27
江苏芯德半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

With the thinning of the wafer, the warpage of the product is increasing, which has exceeded the automatic operation capability of advanced packaging grinding and peeling machines, adhesive machines, printers, dicing and placement machines, etc. The current ultra-thin It is difficult for the chip to be picked up by the mechanical arm without cracks or fragments, which makes it unable to adapt to fully automated operations. The product can only be manually placed on the equipment chassis for manual production
However, since the ultra-thin sheet itself has no other support, it is prone to product cracks and debris during manual transportation

Method used

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  • Wafer-level chip packaging process

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Embodiment Construction

[0024] Detailed reference will be made below to embodiments of the present invention. Although the present invention is illustrated and described with reference to these embodiments, it should be noted that the present invention is not limited only to these embodiments. On the contrary, the present invention covers all alternatives, modifications and equivalents within the spirit and scope of the invention as defined by the appended claims.

[0025] A wafer level 1 chip packaging process, the specific steps are as follows:

[0026] Step 1: Affix the film, and paste a protective film on the front side of the wafer 1 to protect the circuit on the front side of the wafer 1.

[0027] Step 2: Plant balls, and place solder balls on the UBM openings; reflow and clean.

[0028] Step 3: Test, test the electrical properties of each chip through a test probe, distinguish good and bad products, and divide each chip on the wafer into good and bad products according to the test results of...

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PUM

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Abstract

The invention provides a wafer-level chip packaging process which comprises the following steps: pasting an integrated film on the back surface of a wafer through a wafer ring, the integrated film comprising a back adhesive film and a scribing film; film-permeable printing: performing laser printing on the back adhesive film through the scribing film; and high-pressure baking is conducted, and bubbles generated in the integrated membrane in the permeable membrane printing process are eliminated. The integrated film is directly attached to the wafer and the wafer ring, the wafer and the wafer ring form an integral structure through the integrated film, all machines after wafer grinding can automatically grab the wafer ring through a mechanical arm, contact with the wafer is not needed, the full-automatic operation problem of wafer-level packaging of ultrathin wafers and warped wafers is solved, the production efficiency is improved, and the production cost is reduced. Meanwhile, the hidden crack and fragment risks of the wafer-level ultrathin sheet and the warped sheet in the transportation process and the operation process are reduced; in addition, high-pressure baking is carried out, bubbles in the integrated film are discharged from a gap between the scribing film and the back adhesive film in a high-pressure state, and the bubbles are eliminated.

Description

technical field [0001] The invention relates to a chip, in particular to a wafer-level chip. Background technique [0002] Wafer-level packaging is different from the packaging method of mechanical processing. Almost all packaging process steps are completed in parallel in the form of wafers, and then cut into single components. As wafer-level packaging requires thinner packaging for products, the risk of product cracking and debris is greatly increased during product transportation and operation. [0003] Specifically, the packaging process of CSP products is: ball mounting (ball mounting → reflow → cleaning) → testing → grinding (filming → grinding → peeling) → adhesive (adhesive → baking) → printing → dicing ( Patching → baking → dicing) → sorting. [0004] It can be seen from the above process that after the wafer is ground to the specified thickness in the polishing machine, it needs to be transferred to the peeling machine, the adhesive machine, the printer, and the ...

Claims

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Application Information

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IPC IPC(8): H01L21/50H01L21/56H01L21/66B41M5/26
CPCH01L21/50H01L21/561H01L22/20B41M5/267
Inventor 陈小响杜阳
Owner 江苏芯德半导体科技有限公司