Manufacturing method of semiconductor structure and semiconductor structure

Abstract

The invention provides a manufacturing method of a semiconductor structure and the semiconductor structure. The manufacturing method of the semiconductor structure comprises the following steps: providing a substrate; removing part of the substrate to form a plurality of active columns, and separating any two adjacent active columns in the first direction; a plurality of bit lines extending in the first direction are formed, and each bit line wraps part of the side wall of the bottom area of each active column in the extending direction of the bit line. According to the manufacturing method of the semiconductor structure, the technological process of forming the bit line is simplified, the formed bit line surrounds and covers part of the side wall in the circumferential direction of the active column, the contact area of the bit line and the active column is increased, the contact resistance of the bit line and the active column is reduced, and the electrical performance of the semiconductor structure is improved.

Description

technical field [0001] The present disclosure relates to the field of semiconductor technology, and in particular, to a method for fabricating a semiconductor structure and a semiconductor structure. Background technique [0002] With the development of dynamic random access memory (Dynamic Random Access Memory, DRAM for short), in order to improve the storage capacity of the memory, semiconductor devices are required to have higher integration density and smaller feature size. In order to improve the storage density, semiconductor devices have developed from a planar gate to a gate-all-around (Gate-All-Around, GAA for short). The full-surround gate realizes the four-side coverage of the gate to the channel, which improves the density of the memory. [0003] However, in a memory with a full surrounding gate, the bit line is located at the bottom of the gate, the bit line process is complicated, the contact area between the formed bit line and the active region is small, and...

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Problems solved by technology

[0003] However, for a memory with a fully surrounding gate, the bit line is located at the bottom of the gate, the bit line manufacturing process is complex and the contact area between the formed bit line and the active area is small, and the conductivity of the bit line is weak, which affects the electrical performance of the memory

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