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FPGA circuit fault injection method and IP core thereof

A circuit fault and fault injection technology, which is applied in electrical testing/monitoring, instruments, testing/monitoring control systems, etc., can solve problems such as single injection mode and fault type, lack of versatility, and incompatibility with DUT interface protocols, etc., to achieve Flexible DUT interface, flexible monitoring, and strong compatibility

Pending Publication Date: 2022-06-28
NAT SPACE SCI CENT CAS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to overcome the shortcomings of existing FPGA circuit fault injection methods that do not possess universality, single injection mode and fault type, and incompatibility with complex and changeable DUT interface protocols, thereby proposing a FPGA circuit fault injection method and its IP core; the present invention adopts an improved fault injection algorithm and selects a suitable hardware structure, and only needs to be parameterized to configure, and can realize compatibility with different series of FPGA chips, support multiple injection modes and fault types, and be compatible with complex and changeable DUT interfaces protocol, is an FPGA circuit fault injection IP core for aerospace load engineering applications

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  • FPGA circuit fault injection method and IP core thereof
  • FPGA circuit fault injection method and IP core thereof
  • FPGA circuit fault injection method and IP core thereof

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Embodiment Construction

[0068] The technical solutions provided by the present invention are further described below in conjunction with the embodiments.

[0069] The invention discloses an FPGA circuit fault injection method and an IP core thereof, and relates to the technical field of single event effect evaluation of SRAM type FPGA circuits. Various fault injection modes and fault types, as well as the inability to deal with technical problems such as complex and changeable DUT interface protocols; the IP core for running the FPGA circuit fault injection method includes a serial data transceiver module, a data protocol analysis module, a register module, a fault set storage module, single frame reconstruction instruction storage module, load set storage module, readback set storage module, FLASH interface control module, JTAG interface control module and DUT interface control module;

[0070] Wherein, the serial data transceiver module is connected with the data protocol analysis module and the re...

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Abstract

The invention relates to the technical field of spaceflight technology and FPGA circuit single event effect evaluation, in particular to an FPGA circuit fault injection method and an IP core thereof. The IP core comprises a serial data transceiver module, a data protocol analysis module, a register module, a fault set storage module, a single-frame reconstruction instruction storage module, a load set storage module, a read-back set storage module, a FLASH interface control module, a JTAG interface control module and a DUT interface control module. The FPGA circuit fault injection method and the IP core thereof are high in compatibility, suitable for fault injection of multiple types of FPGA chips, capable of supporting a bit-by-bit injection mode and an accumulation injection mode and supporting multiple fault types, flexible in DUT interface and convenient to use.

Description

technical field [0001] The invention relates to the technical field of aerospace technology and FPGA circuit single event effect evaluation, in particular to a FPGA circuit fault injection method and an IP core thereof. Background technique [0002] FPGA (Field Programmable Gate Array, Field Programmable Gate Array) is the core signal processing device of aerospace electronic system, which is widely used in various payloads and platform stand-alone in spacecraft. Because the FPGA contains a large number of information storage units, the FPGA is extremely susceptible to the influence of the space radiation environment, and the occurrence of single event overturn is one of the main reasons for the system failure of the satellite. At present, single-particle irradiation tests relying solely on ground-based heavy ion accelerators are limited by the serious shortage of irradiation test time, which leads to the "bottleneck" problem of long reliability evaluation cycle and high cos...

Claims

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Application Information

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IPC IPC(8): G05B23/02
CPCG05B23/0256
Inventor 李悦朱翔赵旭韩建伟
Owner NAT SPACE SCI CENT CAS
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