Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for making metal oxide semiconductor transistor

A technology of oxide semiconductor and manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor device, electrical components and other directions, can solve problems such as complicated process steps

Inactive Publication Date: 2005-06-29
MACRONIX INT CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, in order to form a MOS transistor with this LDD, its process steps will become quite complicated

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for making metal oxide semiconductor transistor
  • Method for making metal oxide semiconductor transistor
  • Method for making metal oxide semiconductor transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0040] Figures 2(a) to 2(f) A method of manufacturing a MOS transistor according to a preferred embodiment of the present invention is shown.

[0041] Referring to FIG. 2( a ), a gate oxide layer 201 , a gate electrode 202 and a field oxide layer 203 have been formed on a P-type silicon substrate 200 by using the prior art. Wherein, the exposed surface 204 of the silicon substrate 200 will be used to manufacture the source and drain of the MOS transistor. In this embodiment, the gate electrode 202 is made of polysilicon, and the field oxide layer 203 is a silicon dioxide layer grown by a wet oxidation method.

[0042] In this embodiment, before the source / drain regions are formed, a masking layer 220 is deposited on the surface of the substrate, as shown in FIG. 2( b ). The shielding layer 220 is made of a material with good step coverage, such as BARC (Bottom Anti-Reflective Coating). The material of this shielding layer may be made of organic materials; or made of inorgan...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a method for manufacturing a metal oxide semiconductor (MOS) transistor. In this method, a masking layer is deposited on the surface of the silicon substrate before the source / drain regions are formed. The shielding layer covers the gate electrode and the field oxide layer or the shallow isolation trench on the substrate with a uniform thickness. Next, high-concentration ion implantation is carried out on the silicon substrate, and its energy is controlled so that the ions cannot penetrate the shielding layer on the side wall of the gate electrode. After removing the shielding layer, the silicon substrate is doped with low-concentration ions. In this way, MOS transistors with LDD can be formed with fewer process steps.

Description

technical field [0001] The invention relates to a method for manufacturing a MOS transistor, in particular to a method for reducing the steps of forming an LDD. Background technique [0002] In a MOS transistor, the channel length is the distance between the source and drain. To make the component size smaller, the length of the channel must be shortened. However, it is well known that too short a MOS channel will generate hot electron effects (Hot Electron Effects) and affect the performance of the MOS transistor. In order to solve this problem, a lightly doped drain (LDD) can be formed at the place where the source and the drain are close to the channel. [0003] FIG. 1( a ) to FIG. 1( g ) show a method for forming an LDD of a conventional MOS transistor. [0004] First, according to the existing semiconductor process, a gate oxide layer 101 , a gate electrode 102 and a field oxide layer 103 are formed on a P-type silicon substrate 100 , as shown in FIG. 1( a ). Second...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78
Inventor 何濂泽
Owner MACRONIX INT CO LTD