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Method for making metal semiconductor transistor

A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as complicated process steps

Inactive Publication Date: 2004-01-07
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, in order to form a MOS transistor with this LDD, its process steps will become quite complicated

Method used

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  • Method for making metal semiconductor transistor
  • Method for making metal semiconductor transistor
  • Method for making metal semiconductor transistor

Examples

Experimental program
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Embodiment Construction

[0024] Figures 2(a) to 2(f) A method of manufacturing a MOS transistor according to a preferred embodiment of the present invention is shown.

[0025] Referring to FIG. 2( a ), a gate oxide layer 201 , a gate electrode 202 and a field oxide layer 203 have been formed on a P-type silicon substrate 200 by using the prior art. Wherein, the exposed surface 204 of the silicon substrate 200 will be used to manufacture the source and drain of the MOS transistor. In this embodiment, the gate electrode 202 is made of polysilicon, and the field oxide layer 203 is a silicon dioxide layer grown by a wet oxidation method.

[0026] In this embodiment, before the source / drain regions are formed, a masking layer 220 is deposited on the surface of the substrate, as shown in FIG. 2( b ). The shielding layer 220 is made of a material with good step coverage, such as BARC (Bottom Anti-Reflective Coating). The material of this shielding layer may be made of organic materials; or made of inorgan...

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Abstract

This invention discloses a method for processing MOS transistors which is to deposit a shading layer on a silicon base plate before forming a source / drain zone covering the grating electrode, field oxidation layer or shallow isolated ditches on the base plate in a uniform thickness then to carry out ionic implantation of high concentration and control its energy to make it unable to penetrate the shading layer of sidewall of the grating electrode so as to form MOS transistors with LDD in fewer steps.

Description

technical field [0001] The invention relates to a method for manufacturing a MOS transistor, in particular to a method for reducing the steps of forming an LDD. Background technique [0002] In a MOS transistor, the channel length is the distance between the source and drain. To make the component size smaller, the length of the channel must be shortened. However, it is well known that too short a MOS channel will generate hot electron effects (Hot Electron Effects) and affect the performance of the MOS transistor. In order to solve this problem, a lightly doped drain (LDD) can be formed at the place where the source and the drain are close to the channel. [0003] FIG. 1( a ) to FIG. 1( g ) show a method for forming an LDD of a conventional MOS transistor. [0004] First, according to the existing semiconductor process, a gate oxide layer 101 , a gate electrode 102 and a field oxide layer 103 are formed on a P-type silicon substrate 100 , as shown in FIG. 1( a ). Second...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78
Inventor 何濂泽
Owner MACRONIX INT CO LTD