Semiconductor apparatus and its making method

Abstract

The object of the present invention is to improve the working withstand voltage. The semiconductor device of the present invention has: a gate electrode (4); a low-concentration N-type drain region (2) formed adjacent to the gate electrode; and an N+ type drain region (6) separated from the gate electrode (4). ) and is included in the above-mentioned low-concentration N-type drain region (2), characterized in that: a medium-concentration N-type layer (7A) is formed, which is at least from the above-mentioned gate electrode (4) There is a position at a predetermined interval across the region between the above-mentioned high-concentration N+ type drain regions (6), and there is an impurity concentration peak at a position at a predetermined depth in the above-mentioned substrate (1), and in a region close to the substrate surface The impurity concentration becomes lower.

Description

technical field [0001] The present invention relates to a semiconductor device and its manufacturing method. More specifically, it relates to a technique for improving the operating withstand voltage characteristics of a high withstand voltage MOS transistor for a high power supply voltage (HV-VDD) used in an LCD driver or an EL driver, etc. . Background technique [0002] Hereinafter, regarding a semiconductor device related to a conventional example, while referring to Figure 12 The cross-sectional view of the LDD type high withstand voltage MOS transistor shown in . [0003] exist Figure 12 In this case, a gate electrode 53 is formed on a P-type semiconductor substrate (P-Sub) 51 via a gate insulating film 52 . Moreover, an N+ type source region 54 is formed so as to be adjacent to one end of the above-mentioned gate electrode 53, an N-type drain region 56 is formed opposite to the above-mentioned source region 54 via a channel region 55, and an N+ type drain region 57...

AI Technical Summary

Problems solved by technology

⑥The injected electrons reach the drain region 57, which further causes avalanche multiplication

[0015] In addition, in order to improve the operating withstand voltage (VSUS), such as Image 6 As shown in , it is also considered to increase the amount of ion implantation and increase the concentration of the N-type drain region, but as shown by the white circle in the figure, it is not possible to achieve a sufficient improvement in withstand voltage

Furthermore, conversely due to Figure 12 The concentration of the end A of the N-type drain region 56 shown in FIG. , and the increase of the snap back (rapid return) phenomenon caused by the increase of the peak value of the substrate current (I Sub), and furthermore, the drop of the voltage between the source and the drain (BVDS), so far, has not yet sought the operating withstand voltage effective way to improve

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