An apparatus and method for restoring E3/T3 branch signal from synchronous digital transmission hierarchy
A technology for synchronizing digital and signal, applied in the direction of synchronization device, digital transmission system, transmission system, etc., can solve the problem of random bit adjustment leakage and other problems, and achieve the effect of simplifying circuit design, reducing mutual influence, and reducing jitter
Inactive Publication Date: 2006-11-22
GLOBAL INNOVATION AGGREGATORS LLC
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Problems solved by technology
Solve the technical problem that a high-speed clock signal needs to be input when recovering the E3 / T3 branch signal from the synchronous digital transmission system signal in the prior art
[0008] Furthermore, the present invention relates to solving the technical problem that leakage control cannot be performed on random bit adjustment when recovering the E3 / T3 branch signal from the synchronous digital transmission system signal
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[0040] Below in conjunction with accompanying drawing, the present invention is described in detail:
[0041] The frame structure corresponding to the STM-1 level of the SDH synchronous digital transmission system adopts a 9-row*270-column byte frame structure, and the time slot adopts byte interleaving to form a frame structure. figure 1 A schematic diagram of the frame structure is given in , wherein in a frame, the first 9 columns of the frame mechanism are segment overhead bytes POH and pointer bytes, 1-3 rows of which are regeneration segment overhead RSOH, and 5-9 rows are multiplex segments Overhead MSOH, line 4 is the pointer byte, and the remaining information bytes A, B, and C are the information payload area. In the AU4-TUG3 mode, the E3 or T3 signal forms 3 virtual containers VC3, plus the pointer byte TUG3 is formed and multiplexed into the STM-1 frame structure. The frame structure in the AU3 mode corresponding to SDH STM-1 is attached figure 2 In the VC3 comp...
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The invention relates to a device and method for recovering E3 / T3 branch signals from a synchronous digital transmission system. In particular, it relates to a device and method for receiving information data with intervals from a synchronous digital transmission system and recovering E3 / T3 branch signals with small jitter and no intervals. Adopting the technical scheme of the present invention, when recovering the E3 / T3 branch signal from the signal of the synchronous digital transmission system, only a low-speed clock is required to be input, and the requirement for a high-speed clock (such as 155Mbit / s clock) is omitted, and the circuit design is simplified According to the different causes of bit adjustment and pointer adjustment, different leakage control circuits are used to reduce the mutual influence of uniform leakage. On the other hand, due to the adoption of a two-level first-in-first-out buffer control circuit, the leak control and clock dejitter circuits are separated, the tracking speed and bandwidth of the clock recovery circuit are improved, and the jitter of the recovered clock signal is greatly reduced.
Description
technical field [0001] The invention relates to a device and method for recovering E3 / T3 branch signals from a synchronous digital transmission system. In particular, it relates to a device and method for receiving information data with intervals from a synchronous digital transmission system and recovering E3 / T3 branch signals with small jitter and no intervals. Background technique [0002] With the development of information technology and people's huge demand for communication bandwidth, the communication network has changed from analog network to digital network. The development of optical fiber technology has greatly promoted the development of digital communication technology to meet people's demand for communication bandwidth. Optical fiber communication provides low-cost, high-speed information services, rapidly replacing traditional copper cable communication. In order to adapt to the development of optical fiber technology, unify the products of various communica...
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IPC IPC(8): H04L7/033H04L7/00H04L12/28H04L12/24
Inventor 刘峰
Owner GLOBAL INNOVATION AGGREGATORS LLC