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Multiple mode power throttle mechanism

A power control and mechanism technology, applied in energy-saving computing, energy-saving ICT, program control design, etc., can solve problems such as insufficient to offset changes in power consumption

Inactive Publication Date: 2007-03-07
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Instruction throughput adjustments can be implemented with lower latencies than operating point changes, but they may not be sufficient to offset the power consumption changes

Method used

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  • Multiple mode power throttle mechanism
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Embodiment Construction

[0023] In the following discussion, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, one of ordinary skill in the art, having the benefit of this disclosure, will understand that the present invention may be practiced without these specific details. Furthermore, various well-known methods, procedures, components and circuits have not been described in detail in order to focus attention on the characteristics of the present invention.

[0024] The present invention provides mechanisms to control processor power dissipation using multiple power control modes. A computer system includes a processor with digital control. The digital throttle monitors the activity of the processor to estimate the power state of the processor. If permitted by the estimated power state, the digital moderator triggers one of several power control modes. For one embodiment of the invention, the first power mode is triggered if th...

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Abstract

A processor (110) includes a digital throttle (130) to monitor the activity of various units (124) of the processor's instruction execution pipeline (120), and to determine a power state for the processor (110) from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor (110) reaching a threshold.

Description

technical field [0001] The present invention relates to microprocessors, and more particularly, the present invention relates to mechanisms in microprocessors for controlling power consumption. Background technique [0002] Modern processors include a large number of execution resources to support the simultaneous processing of multiple instructions. Processors often include one or more integer, floating point, branch, and memory execution units to implement integer, floating point, branch, and load / store instructions, respectively. A register file and on-chip cache are also provided to provide operands to execution resources. When these resources are fully occupied by executing programs, they can create significant power dissipation problems. [0003] Instruction code sequences that include enough instructions of the correct type to fully occupy the processor's execution resources for an active period of time are relatively rare. Smart compilers and out-of-order executio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/32G06F9/38G06F9/318
CPCG06F9/3836G06F9/3873G06F9/3017G06F1/3203G06F9/3869G06F1/3243Y02B60/1239G06F9/384Y02D10/00G06F9/3858G06F9/3854
Inventor 詹姆斯·伯恩斯戴维·艾尔斯玛莎·恩格爱德华·格罗霍夫斯基斯特凡·鲁苏维韦克·蒂瓦里
Owner INTEL CORP
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