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Receiving device

A signal receiving device and signal receiving technology, applied in the direction of logic circuit connection/interface layout, logic circuit coupling/interface using field effect transistors, transmission system, etc., can solve problems such as difficult impedance matching, and achieve the effect of easy adjustment

Inactive Publication Date: 2007-05-23
SEIKO EPSON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

On the other hand, the matching circuit disclosed in Patent Document 2 has a structure using bipolar transistors, not a device using MOS transistors.
Therefore, it is difficult to perform impedance matching for devices using MOS transistors such as semiconductor integrated circuits

Method used

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Experimental program
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Effect test

Embodiment 1

[0024] FIG. 1 is a circuit diagram of a signal transceiving device according to Embodiment 1 of the present invention.

[0025] In FIG. 1, both the transmitting unit and the receiving unit of the signal transmitting and receiving unit are composed of semiconductor integrated circuits. Input the "1" and "0" data signal VIN at the input terminal 1, input the data signal inverted by the inverter INV1 to the gates of the NMOS transistors QN1 and QN4, and then pass the data signal inverted by the inverter INV1 The inverter INV2 performs inversion, and inputs the inverted data signal to the gates of the NMOS transistors QN2 and QN3. The sources of the NMOS transistors QN1 and QN3 are connected to the low potential point (reference potential point) VEE through the constant current source IH, and the sources of the NMOS transistors QN2 and QN4 are connected to the low potential point (reference potential point) through the constant current source IL. VEE. In addition, the drains of ...

Embodiment 2

[0047] FIG. 5 is a circuit diagram of a receiving and transmitting device according to Embodiment 2 of the present invention. The same reference numerals are used for the same parts as those in the first embodiment of FIG. 1 .

[0048] The configuration of the second embodiment shown in FIG. 5 is that the NMOS transistors QN1-QN6 of the first embodiment shown in FIG. 1 are replaced with PMOS transistors QP21-QP26, and the PMOS transistors QP1 and QP2 of the first embodiment are replaced with NMOS transistors QN21 and QN22. With the replacement of the transistors, the configuration of the constant current sources IH and IL of the transmitting device will be changed, and the structure of the constant current sources I01 and I02 is required in the receiving device. The impedance matching unit 11A of the receiving device is composed of a PMOS transistor QP25 with a current control function and an inverter INV3 with a voltage inversion function; the impedance matching unit 13A is c...

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PUM

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Abstract

Described is a receiving device in which the input impedance is matched to the characteristic impedance of a transmission line, even with the receiving device composed with the MOS transistor. The receiving device is for data transfer by means of the differential-current driven model. It comprises a receiving node for receiving a differential current signal; a current-voltage conversion means for converting current into a voltage corresponding to the differential current signal from the receiving node; an impedance matching means for matching the input impedance to the characteristic impedance, applied in between the receiving node and the current-voltage conversion means, including a low impedance circuit means that enables generation of a low impedance which is lower than the characteristic impedance of the transmission line that is connected to the receiving node as an input impedance of the receiving node; and a comparator into which a differential-voltage signal from the current-voltage conversion means is input as a comparison signal, and which outputs the comparison result thereof as an output data.

Description

technical field [0001] The invention relates to a data transmission and reception device in a differential current drive mode using current as a signal transmission mode. Background technique [0002] With the development of technologies such as the high-speed operation of semiconductor integrated circuits and central processing units (CPUs) that constitute electronic instruments, and the increase in signal processing capacity, etc., there is a problem between electronic instruments or circuits that constitute electronic instruments. , the need for high-speed signal transmission through transmission lines. [0003] When transmitting signals through transmission lines between electronic devices or between circuits constituting electronic devices, in order to solve the problem of signal response delay caused by the capacitance component of the transmission line when voltage is used as the signal transmission method. Currently, a high-speed interface circuit that uses electric...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/0175G06F3/00H03K19/0185H04L25/02
CPCH04L25/0278H04L25/0292H04L25/0272
Inventor 植松彰
Owner SEIKO EPSON CORP