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Method of making semiconductor components

A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as formation of holes in the isolation region of dynamic random access memory

Inactive Publication Date: 2007-07-04
NAN YA TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] Therefore, the object of the present invention is to provide a method of manufacturing a semiconductor device to solve the known problem that holes will be formed in isolation regions during the manufacturing process of dynamic random access memories.

Method used

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  • Method of making semiconductor components
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  • Method of making semiconductor components

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Embodiment Construction

[0029] 2A to 2C are schematic cross-sectional views of the front-end manufacturing process of a DRAM device according to a preferred embodiment of the present invention.

[0030] 2A, a substrate 100 is firstly provided, wherein the substrate 100 has a memory cell region 130 and a peripheral circuit region 140, and a gate structure 110a has been formed in the memory cell region 130 (by gate dielectric layer 104a, gate Conductive layer 106a and top cover layer 108a), and the isolation region 102 has been formed in the peripheral circuit region 140 to connect with the gate structure 110b (formed by gate dielectric layer 104b, gate conductive layer 106b and top cover layer 108b ). In a preferred embodiment, the material of the gate dielectric layer 104a, 104b is, for example, silicon oxide, the material of the gate conductive layer 106a, 106b is, for example, polysilicon, and the material of the top cap layer 108a, 108b is, for example, silicon nitride. The isolation region 102 i...

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Abstract

A method of making semiconductor component comprises the steps of, forming a first dielectric layer on a substrate having a grid arrangement, etching the first dielectric layer and forming a gap wall on the side walls of each grid arrangement, furtherly, forming source / drain area in the substrates on the two sides of the gap wall, and forming a second dielectric layer on the substrate, wherein the second dielectric layer has the same material quality as the first dielectric layer. The first dielectric layer needs not to be removed, and the second dielectric layer can be formed directly, therefore, the problem of opening on the isolated area when removing the first dielectric layer can be prevented.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor device, and in particular to a method for preventing damage to a shallow trench isolation region of a dynamic random access memory device. Background technique [0002] DRAM uses charged and uncharged capacitors on a substrate to store binary data. A capacitor represents a storage bit for which stored binary data "0" or "1" represents the state of the capacitor as "charged" or "uncharged", respectively. By transferring the field effect transistor, the read / write action in DRAM can be completed, wherein the source of the transfer field effect transistor is connected to the bit line (Bite Line, BL), its drain is connected to the capacitor, and its gate is connected to the word line (Word Line, WL) connection. Through the transfer field effect transistor, a voltage is passed through the bit line to charge the capacitor, and the transfer field effect transistor selectively control...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8242H10B12/00
Inventor 王建中吴国坚
Owner NAN YA TECH