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Semiconductor device and manufacturing method thereof

A technology for semiconductors and devices, applied in the field of semiconductor devices and their manufacturing, can solve the problems such as the inability to shorten the read/write time and the time required

Inactive Publication Date: 2002-10-30
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it takes time for signal propagation due to the influence of CR delay, and there is a problem that the read / write time cannot be shortened

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0044] First, as Embodiment 1 of the present invention, a semiconductor device having a capacitor capable of high-speed operation will be described.

[0045] figure 1 It is a conceptual diagram showing the cross-sectional structure of a main part of a capacitor provided in the semiconductor device of this embodiment.

[0046]That is, this capacitor is a trench capacitor provided on the silicon substrate 1, and is a specific example formed in three regions A, B, and C as viewed in the direction in which the trench extends. In the region A at the front end of the trench, a nitride film 6 , polysilicon 7 , barrier layer 8 , and metal electrode 9 are sequentially provided from the trench inner wall. In addition, in the middle region B of the trench, the surrounding silicon oxide film 10, the polysilicon 11, the barrier layer 12, and the metal electrode 13 are sequentially provided from the inside of the trench. In addition, in the entrance region C of the trench, polysilicon 14...

Embodiment approach 2

[0081] Hereinafter, as Embodiment 2 of the present invention, a capacitor not containing polysilicon will be described.

[0082] Figure 6 It is a conceptual diagram showing the cross-sectional structure of main parts of a capacitor provided in the semiconductor device of the present embodiment. In the same figure, and in the previous figure 1 The same reference numerals are assigned to the same parts as those described in FIG. 5 , and detailed description thereof will be omitted.

[0083] That is, the capacitor, and figure 1 Compared with the capacitor shown, it is characterized in that polysilicon 7, 11 and 14 are not provided. That is, the inside of the trench is filled with a metal electrode to further improve conductivity. As a result, the transfer speed of charges can be further improved, and the semiconductor device can be operated at a higher speed.

[0084] In this embodiment, the materials of the metal electrodes used in the regions A, B, and C may be the same...

Embodiment approach 3

[0094] Hereinafter, as a third embodiment of the present invention, a semiconductor device having a memory cell capable of greatly increasing the degree of integration will be described.

[0095] Figure 9 It is a conceptual layout diagram showing the planar configuration of memory cells of the semiconductor device of this embodiment.

[0096] Additionally, Figure 10A is Figure 9 The A-A line sectional view, Figure 10B is Figure 9 B-B line sectional view. Furthermore, in the cross-sectional view of this embodiment including FIG. 10, only the upper portion of the trench capacitor is shown, and the storage node portion at the front end is omitted. In addition, the electrode structure inside the capacitor is omitted in the figure.

[0097] From Figure 9 It can be seen that the capacitors in this embodiment are four memory cells formed by four trench capacitors 30A to 30D and one bit line contact 32 . exist Figure 9 In the diagram, a cross-shaped pattern centering on th...

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Abstract

By forming at least a part of the electrode of the trench capacitor with metal, the surface resistance of the electrode can be reduced, and since the signal propagation time caused by CR delay can be shortened, the read / write time can be shortened. In addition, by forming a buried gate electrode, the cell area obtained by DRAM and DRAM / logic circuit hybrid devices can be miniaturized, the gate length becomes longer, and the short channel effect can be reduced. film, so that the bit line contacts can be self-aligned.

Description

technical field [0001] The present invention relates to a semiconductor device and its manufacturing method. More specifically, it relates to a semiconductor device capable of high-speed operation and high integration among DRAMs and hybrid devices of DRAM and logic circuits, and its manufacturing method. Background technique [0002] As the storage nodes of DRAM, trench capacitors and stack capacitors are the mainstream today, especially trench capacitors, which are mostly used as capacitors suitable for mixing with logic circuits. This is because the capacitor can be formed before the logic circuit is formed, which has little influence on the logic circuit process, and because the capacitor is buried in the silicon substrate, it does not require a deep contact process in the wiring process as with stacked capacitors. [0003] Hereinafter, the configuration of the trench capacitor according to the present invention will be described with reference to its manufacturing metho...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8234G11C11/40H01L21/334H01L21/70H01L21/822H01L27/02H01L27/08H01L27/088H01L27/10H01L29/76H01L29/94H10B12/00H10B99/00
CPCH01L27/0207H01L29/66181H01L29/945H10B12/37H10B12/0383H10B12/0385H10B12/05H10B12/0387H10B12/053H10B12/485H10B12/09H10B12/50H10B12/00
Inventor 小池英敏佐贯朋也
Owner KK TOSHIBA