Storing device

Abstract

In a memory device having a controller and multiple memory modules both of which are mounted together on a motherboard, a high-speed operation is executed by suppressing waveform distortion caused by signal reflection. Since signal reflection occurs when a controller performs the writing / reading of data relative to memory units on memory modules, active terminator units are included in the controller and the memory units. These active terminator units are provided for a data bus and / or a clock bus in order to terminate these buses in memory units. The active terminator units provided for the controller and the memory units may be put into an inactive state when data is to be received.

Description

technical field [0001] The present invention relates to memories, and more particularly to memories having a circuit structure capable of increasing operation speed. Background technique [0002] While the memory is highly integrated, an interface that enables the memory to operate at high speed and low signal amplitude has also been developed. Therefore, SSTL (Stub Serial Termination Logic) is proposed as a standard for these interfaces. In order to increase the operation speed of DRAM, which is a type of memory, the DDR (Double Data Rate) method has been proposed. In the DDR method, the data rate is doubled by synchronizing the input and output data with the leading and trailing edges of each clock. [0003] This type of memory has a structure in which a plurality of memory modules are mounted on a motherboard in parallel at a certain distance or interval. According to this structure, when the memory modules are mounted on the motherboard, electrical contact is establis...

AI Technical Summary

Problems solved by technology

Does not take into account the signal reflections that occur at memory cells in this structure

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