Electrostatic discharge protective circuit structure and manufacturing method thereof
A technology of electrostatic discharge protection and manufacturing method, which is applied in the direction of circuit, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problem of wasting space, achieve the effects of shortening distance, saving space, and good protection effect
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[0052] figure 2 It is a structural schematic diagram of the electrostatic discharge protection circuit of the present invention.
[0053] Please refer to figure 2 ,exist figure 2 In the PMOS region 250 of the P-type substrate 200, an N-well region 202 is provided, wherein the depth of the N-well region 202 is, for example, about 2 μm. Then, a PMOS transistor 206 and an N+ pedestal connection region 216 are disposed in the N well region 202 . The PMOS transistor 206 is composed of a gate 208 , a source 210 and a drain 212 . And in the N well region 202 , the N+ pedestal connection region 216 and the PMOS transistor 206 are separated by the shallow trench isolation layer 214 . In a preferred embodiment of the present invention, the depth of the shallow trench isolation layer 214 is, for example, about 4000 angstroms.
[0054] Moreover, a deep trench isolation layer 220 is provided outside the N+ base connection region 216 to replace the known guard ring. As far as the PM...
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