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Flash electric charge amplification structure focal plane reading-out circuit and its reset reading-out method

A charge amplification and readout circuit technology, applied in TV, electrical components, color TV, etc., can solve the problems of excessive transient peak current, limited area, and reduce the signal-to-noise ratio of the circuit, so as to reduce the transient peak current , Large charge storage capacity, the effect of reducing FPN noise

Inactive Publication Date: 2004-02-25
PEKING UNIV
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AI Technical Summary

Problems solved by technology

In this case, the reset level V R The signal line needs to be at least 60 μm wide, otherwise the reliability of the chip will be severely reduced; in addition, the transient peak current is too large, which will also bring great difficulties to the design of the external driver board
[0025] (2) The inconsistency of the time interval from reset to readout reduces the signal-to-noise ratio of the circuit:
The unit circuit is composed of at least 4 transistors or 3 transistors that store charges by potential wells, so that the area of ​​the integral capacitance or potential well for storing integrated charges is limited, reducing the charge handling capability and other performance of the readout circuit
This defect is reduced to 30×30μm in the pixel area 2 It is especially evident when

Method used

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  • Flash electric charge amplification structure focal plane reading-out circuit and its reset reading-out method
  • Flash electric charge amplification structure focal plane reading-out circuit and its reset reading-out method
  • Flash electric charge amplification structure focal plane reading-out circuit and its reset reading-out method

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Embodiment Construction

[0056] The focal plane readout circuit with a flash charge amplification structure using a row-by-row reset structure, the overall block diagram is as follows image 3 As shown, its unit circuit and architecture are as follows Figure 4 shown. The standard CMOS process is adopted, and the array scale is N×M. In this embodiment, N=M=130.

[0057] refer to image 3 with Figure 4 As shown, the whole circuit includes the following parts:

[0058] 1. An N×M-scale unit circuit array receives optical signals and completes the conversion and integration of photoelectric signals; each pixel unit consists of two switch tubes (Mint and Msw) and a transistor (Ms) used as a MOS capacitor.

[0059] 2. The 1×N scale shift register array is used to generate the row selection signal Rsel(i). Under the control of the row selection signal Rsel(i), the signal (charge) in the pixel unit is transferred to the column readout stage row by row ;

[0060] 3. The 1×M scale shift register array i...

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Abstract

The present invention provides a focal plane reading circuit of flash charge amplification structure and its reset read-out method. The pixel unit reset circuit in the reading circuit is positioned outside of the pixel unit circuit, including identical subunit circuit whose column number is equal to that of pixel unit circuit array, every column of pixel units of pixel unit circuit array shares one reset subunit circuit. Its reset read-out method adopts a row-by-row reset scheme.

Description

Technical field: [0001] The invention belongs to the technical field of a readout structure and a reset readout method in an imaging system readout circuit in the field of microelectronics and optoelectronics, and in particular relates to a focal plane readout circuit with a flash charge amplification structure. Background technique: [0002] Infrared thermal imaging system has important applications in many fields such as military, medicine, industry and agriculture, astronomy, etc., and its core technology is infrared focal plane components. The component consists of an infrared detector array and a readout circuit (ROIC: Read-Out Integrated Circuits). ROIC is an important factor affecting the performance and functionality of components. [0003] Common ROIC circuits include unit circuits, column processing stages, output buffer stages, and control signal generation. The unit circuit is the interface circuit between the detector and the ROIC, which completes functions su...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/148H04N5/33
Inventor 陈中建吉利久高峻鲁文高刘菁张天义
Owner PEKING UNIV
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