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Method of manufacturing semiconductor device

A semiconductor and component technology, applied in the field of manufacturing semiconductor components, can solve problems such as inability to provide contact surfaces, poor contact surfaces, and increased contact resistance

Inactive Publication Date: 2005-02-02
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0013] However, this step can only minimize the influence of the natural oxide film, but cannot provide a clean contact surface, and as a result, the contact resistance increases due to the poor contact surface

Method used

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  • Method of manufacturing semiconductor device
  • Method of manufacturing semiconductor device
  • Method of manufacturing semiconductor device

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Embodiment Construction

[0024] Preferred embodiments of the present invention are described below with reference to the accompanying drawings. In the following description and drawings, the same reference numerals are used to designate the same or similar components, and thus descriptions of the same or similar components are omitted.

[0025] Figure 4A to Figure 4D is a cross-sectional view illustrating a method of manufacturing a semiconductor element according to an embodiment of the present invention.

[0026] Please see Figure 4A , a semiconductor substrate 41 on which a predetermined lower structure having junction regions 42 is formed is prepared. In the junction region 42 , the conductivity of the semiconductor is adjusted according to the type, doping concentration and doping depth of the dopant.

[0027] Please see Figure 4B , an interlayer dielectric film 43 is deposited on the entire surface of the silicon substrate 41 to cover the lower structure having the junction region 42 . T...

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Abstract

Disclosed is a method of manufacturing a semiconductor device, which prevents a contact resistance due to a native oxide film from being increased. (1) Semiconductor substrate on which a lower structure having a junction region is formed is prepared. (2) Interlayer dielectric film is formed over a whole surface of semiconductor substrate. (3) Contact hole exposing the junction region is formed by etching interlayer dielectric film. (4) Dry-cleaning and wet-cleaning for a substrate surface exposed by the contact hole are sequentially performed. (5) Washed contact surface is preliminarily treated under reducing gas atmosphere to remove a native oxide film formed on contact surface. (6) Impurity is additionally doped to a surface of the junction region in-situ so that impurity damages on preliminary-treated contact surface are compensated for. (7) Conductive film is deposited on the contact hole and the interlayer dielectric film in-situ.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor element, and more particularly to a method of manufacturing a semiconductor element capable of preventing an increase in contact resistance due to a natural oxide film. Background technique [0002] As is well known, in addition to the advancement of semiconductor technology, the development of high-speed operation and highly-integrated semiconductor elements is also actively underway. Therefore, fine alignment and high integration of patterns are required. According to this trend, various process technologies have also been developed and used to obtain excellent device performance. [0003] In particular, in order to improve the operating efficiency of semiconductor elements, new contact process technologies have been developed. In this contact process technology, when the contact between the upper and lower patterns (pattern) is unstable, or the contact resistance increases,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/02H01L21/223H01L21/285H01L21/306H01L21/311H01L21/324H01L21/768
CPCH01L21/76814H01L21/28512H01L21/76828H01L21/324H01L21/2236H01L21/76826H01L21/02063H01L21/28
Inventor 李锡奎金一旭
Owner SK HYNIX INC