Memory shortage diagnostic method using failure mode as guide and its system

A failure mode and defect diagnosis technology, which is applied to the generation of response errors, error detection of redundant data in hardware, etc., can solve problems such as insufficient test algorithms and poor accuracy of diagnosis results

Inactive Publication Date: 2005-03-23
NASOFORM INC +1
View PDF0 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, there are many shortcomings in both the failure mode and the failure bitmap. For example, many different causes are identified as the same failure mode, which will result in poor diagnostic accuracy.
On

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Memory shortage diagnostic method using failure mode as guide and its system
  • Memory shortage diagnostic method using failure mode as guide and its system
  • Memory shortage diagnostic method using failure mode as guide and its system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] Generally speaking, the fault model needs to be selected as the target of error detection before executing the test algorithm. General memory fault models include: Stuck-At Fault (SAF), Transition Fault (TF), Stuck-Open Fault (SOF), Address Decoder Fault (AF) , Coupling Fault (Coupling Fault, CF) and Read Disturb Fault (Read Disturb Fault, RDF). The defects in the memory can be detected by the fault model, and the cause of the defects can be further analyzed.

[0026] Among many test algorithms, the MARCH-based test and diagnosis algorithm is one of the easier to implement, whether it is applied to test equipment or the built-in self-test circuit of the system-on-chip is quite simple. The following calculation formula is the MARCH-17N algorithm adopted by an embodiment of the present invention.

[0027] ⇑ ( w 0 ) ⇑ ( r 0 , ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to an approach of memory defect diagnoses which uses failure mode as direction. It conducts analyzing and comparing failure mode and disable mode. Through comparing with defect database built previously, practical problems in memory making and design can be found according to possible defect in different failure modes defined in the database.

Description

technical field [0001] The invention relates to a memory defect diagnosis method and its system, in particular to a failure mode-oriented memory diagnosis method and its system. Background technique [0002] Memory is the most basic component in a digital system, and will occupy most of the area in a system-on-chip (SoC) design, so it has become an important part that determines the yield rate of a system-on-chip. As the capacity and density of embedded memory continues to increase, the testing problem becomes more difficult and complex. In order to effectively improve the manufacturing yield of the SoC, memory diagnosis (diagnostic) and failure analysis (Failure Analysis, FA) have become very important topics. [0003] Since most of the decrease in yield is caused by defects generated in the wafer manufacturing process, failure analysis can be used to check the cause of the defect that causes the decrease in yield. According to the results of the failure analysis, the des...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F11/18
Inventor 吴诚文黄稚存王志伟郑国良李日农
Owner NASOFORM INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap