A shallow trench isolation approach for improved STI corner rounding

A technology of shallow trench isolation and rounding, which is used in the manufacture of electrical components, circuits, semiconductor/solid-state devices, etc. to increase performance and reduce leakage.

Inactive Publication Date: 2005-04-27
CYPRESS SEMICONDUCTOR
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  • Abstract
  • Description
  • Claims
  • Application Information

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However, neither of these two methods sufficiently rounds th

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  • A shallow trench isolation approach for improved STI corner rounding
  • A shallow trench isolation approach for improved STI corner rounding
  • A shallow trench isolation approach for improved STI corner rounding

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[0011] The present invention relates to a method of performing trench isolation during semiconductor component manufacturing. The following descriptions will enable those skilled in the art to make and use the present invention, and provide the contents of the patent application and its description. The various modifications of the preferred embodiment and the general principles and features described therein are easily understood by those skilled in the art. Therefore, the present invention is not intended to be limited by the illustrated embodiments. On the contrary, the present invention will conform to the broadest scope according to the principles and features described therein.

[0012] The present invention provides a method for performing shallow trench isolation to improve STI corner rounding in semiconductor devices. After the shallow trench is etched into the substrate, the process includes performing a dual substrate oxidation process before the STI is filled. Then, a ...

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Abstract

A method for performing shallow trench isolation during semiconductor fabrication that improves trench corner rounding is disclosed. The method includes etching trenches (34) into a silicon substrate (24) between active regions (30), and performing a double liner oxidation process (56) and (60) on the trenches (34). The method further includes performing a double sacrificial oxidation process (72) and (76) on the active regions (30), wherein corners (35) of the trenches (34) are substantially rounded by the four oxidation processes.

Description

technical field [0001] The present invention relates to semiconductor processing and, in particular, to methods of performing trench isolation during the manufacture of semiconductor components. Background technique [0002] Shallow Trench Isolation (STI) technology uses shallow, refilled trenches to isolate devices that are the same type as LOCOS isolation instead of LOCOS isolation. The process begins by depositing a layer of pad oxide on the silicon substrate and patterning a nitride mask to define an active area on the silicon substrate. The shallow trenches are then etched into the silicon substrate through the openings in the silicon nitride mask between the active areas. A liner oxidation process is performed on the recess where the thin layer oxide is grown. Next, an oxide (such as silicon dioxide) is deposited on the silicon substrate, and then etched back so that only the oxide remains in the trenches, the top surface of which is level with the nitride mask. Aft...

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Application Information

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IPC IPC(8): H01L21/76H01L21/762
CPCH01L21/76235H01L21/762
Inventor 金恩顺孙禹木下博元张国栋H·K·沙奇M·S·张
Owner CYPRESS SEMICONDUCTOR
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