System and method for validating wire-laying interval on PCB
A technology of printed circuit board and wiring distance, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems affecting the quality of printed circuit board finished products, complex calculation process, affecting electromagnetic interference, etc., to reduce electromagnetic interference , to avoid inaccuracy, to avoid the effect of human negligence
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[0014] Such as figure 1 Shown is the hardware architecture diagram of the wiring distance verification system of the printed circuit board of the present invention. The system includes a computer 10 , a database 11 and a connection 12 . Wherein computer 10, it comprises a plurality of software function units, is used for carrying out the calculation and verification of the shortest distance between lines (net) in the printed circuit board wiring process; database 11, is used for storing all net related information in the printed circuit board, including A line id (net id), all line segments (net segment) on each line, each line segment id (segment id), the basic rectangle of each line segment (segment selectbox), each line segment type (segment type) and other information. The net id is used to identify the net; the net segment is used to indicate the segment contained on the net; the segment id is used to identify the segment; the segment selectbox is used to determine a min...
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