System and method for recovery from disaster
A disaster recovery and system information technology, which is applied in the field of network security and data communication technology, can solve problems such as being stuck in an endless loop, paralysis or even collapse, loss, system paralysis, etc., and achieve the effect of improving self-healing ability and enhancing stability
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Embodiment 1
[0033] The system structure of this embodiment is as figure 1 As shown, it mainly includes: a clock source 1 , a memory 2 , a main control unit 3 and a hardware watchdog counter 4 .
[0034] Wherein, the clock source 1 is used to provide the clock to the hardware watchdog counter 4, which can be a crystal or a crystal oscillator; the memory 2 is used to regularly save the important information of the main control unit 3, which can be a non-volatile random access memory (NVRAM) Or flash memory (FLASH); Main control unit 3 is used for sending clearing signal and control hardware watchdog on / off signal to hardware watchdog counter 4, can be the main control unit of CPU or network equipment or network system or theirs Combination, etc.; hardware watchdog counter 4, used to interact with main control unit 3, obtain clear signal and on / off signal from main control unit 3, and send system reset signal to main control unit 3, can use programmable gate Array FPGA or complex programmab...
Embodiment 2
[0045] Such as image 3 As shown, the system structure of this embodiment is that a sequential logic processing unit is added on the basis of Embodiment 1 to realize the monitoring of the main control unit at the level of 3 milliseconds. The system of this embodiment includes: a clock source 1, a memory 2 , a main control unit 3 , a hardware watchdog counter 4 and a sequential logic processing unit 5 .
[0046] Wherein, the clock source 1 is used to provide the clock to the hardware watchdog counter 4, which can be a crystal or a crystal oscillator; the memory 2 is used to regularly save the important information of the main control unit 3, which can be NVRAM or FLASH, etc.; the main control unit 3 It is used to send a clear signal to the hardware watchdog counter 4 and control the hardware watchdog on / off signal, which can be the main control unit of the CPU or network device or network system or a combination of the three; the hardware watchdog counter 4 , used to interact ...
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