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Method of fabricating metal silicate layer using atomic layer deposition technique

A technology of atomic layer deposition and metal silicate, which is applied in metal material coating process, semiconductor/solid-state device manufacturing, coating, etc., can solve problems such as difficult transformation

Active Publication Date: 2006-02-15
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, it has been found that it is very difficult to convert a metal oxide layer into a metal silicate layer by supplying a silicon source gas after repeating the metal oxide layer forming step 10 or more times.

Method used

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  • Method of fabricating metal silicate layer using atomic layer deposition technique
  • Method of fabricating metal silicate layer using atomic layer deposition technique
  • Method of fabricating metal silicate layer using atomic layer deposition technique

Examples

Experimental program
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Effect test

Embodiment

[0065] image 3 is a graph illustrating different hafnium silicate layer thicknesses formed on a semiconductor substrate according to embodiments of the present invention. image 3 The horizontal axis P in represents the measurement positions of the semiconductor substrate, and these measurement positions are spaced apart from each other by 7 mm downward from the center of the semiconductor substrate. image 3 The vertical axis T in represents the measured thickness, and the thickness unit is _. exist image 3 In the three examples shown, among the various process conditions used to form the hafnium silicate layer, the reactor temperature, settling pressure and pulse time of supplying the hafnium source gas were the same for comparison. Specifically, the temperature of the reactor was set at 320° C., and the deposition pressure was set at 0.2 Torr. In addition, the pulse time for supplying the hafnium source gas was set at 0.2 seconds.

[0066] according to image 3 , Cur...

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PUM

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Abstract

There are provided methods of fabricating a metal silicate layer on a semiconductor substrate using an atomic layer deposition technique. The methods include performing a metal silicate layer formation cycle at least one time in order to form a metal silicate layer having a desired thickness. The metal silicate layer formation cycle includes an operation of repeatedly performing a metal oxide layer formation cycle K times and an operation of repeatedly performing a silicon oxide layer formation cycle Q times. K and Q are integers ranging from 1 to 10 respectively. The metal oxide layer formation cycle includes the steps of supplying a metal source gas to a reactor containing the substrate, exhausting the metal source gas remaining in a reactor to clean the inside of the reactor, and then supplying an oxide gas into the reactor. The silicon oxide layer formation cycle includes supplying a silicon source gas, exhausting the silicon source gas remaining in the reactor to clean the inside of the reactor, and then supplying an oxide gas into the reactor.

Description

technical field [0001] The present invention relates to a method of fabricating thin layers of semiconductor devices, and more particularly to a method of fabricating metal silicate layers using an atomic layer deposition (ADL) process. Background technique [0002] With the increasing demand for highly integrated semiconductor devices, transistors and capacitors constituting semiconductor elements must be made smaller and smaller to meet the demand for smaller sizes. Semiconductor tubes and capacitor elements typically include a dielectric. Efforts to reduce the overall size and thickness of such dielectrics, however, have resulted in many difficulties in fabrication. [0003] For example, if the thickness of the gate dielectric layer, which is one constituent element of the transistor, is formed too thin, it may result in deterioration of the insulating properties of the gate dielectric layer. Silicon dioxide is generally used as a material for forming the gate dielectri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/316H01L21/304C23C16/44C23C16/40H01L21/205
CPCC23C16/06C23C16/4408C23C16/45527C23C16/45553
Inventor 金润奭金宗杓林夏珍朴哉彦丁炯硕李钟镐梁钟虎
Owner SAMSUNG ELECTRONICS CO LTD