Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method

A software and hardware collaboration and verification system technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve the problems of increasing complexity, reducing efficiency, increasing difficulty of SoC systems, and improving accuracy and correctness , the effect of reducing workload and improving simulation speed

Active Publication Date: 2006-09-06
成都雷奥风电传感器有限公司
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Problems solved by technology

Because there are so many powerful modules and there are complex interaction processes between these modules, the difficulty of SoC system design is increasing rapidly, and simulation/verification is the most important part of the integrated circuit design process. The complexity is also growing rapidly, which makes the traditional method far from meeting the needs of the current industry
The main problem facing the current SoC system simulation/verification field is that a l

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  • Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method
  • Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method
  • Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method

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Embodiment Construction

[0068] According to the modular analysis of the above-mentioned architecture, the realization of the improved Vector mode software-hardware co-simulation can be completed by realizing the functions of each module separately, and then connecting them according to the specified interface and combining them into a whole. The specific realization can be Divided into the following sections:

[0069] 1. Software part:

[0070](1) Use text format, and describe the stimulus vector file and response vector file in accordance with the specified format;

[0071] (2) adopt C / C++ to realize the frame processing module of the software part;

[0072] (3) Realize the communication channel driver module by calling the API function related to the operating system.

[0073] Second, the hardware part:

[0074] (1) The communication channel transceiver module in the FPGA hardware platform part can be realized through a dedicated interface chip and the internal logic function of the FPGA, and co...

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Abstract

The system with a PC software part and FPGA hardware comprises: a bottom layer to transfer information on physical channel, a middle layer to pack and unpack data frame, and a top layer for signal input/output. Wherein, it sends ahead the expected result into the hardware for storage. This invention improves simulation speed greatly with well accuracy.

Description

technical field [0001] A software-hardware co-simulation / verification system and a vector mode simulation / verification method belong to the technical field of SoC simulation and verification. Background technique [0002] Terminology and some important abbreviations [0003] Software-hardware co-simulation / verification: refers to dividing a large-scale simulation / verification system into two parts, software and hardware, and the part that requires a lot of calculations is simulated / verified on the FPGA hardware platform, which is called the hardware part; The stage description or the simulation / verification part for stimulus input and response output is done using PC or workstation, which is called software part. In this way, a large-scale simulation / verification system with improved functions and speed can be formed by combining the respective advantages of FPGA hardware simulation and PC software simulation. [0004] Vector software-hardware co-simulation / verification mo...

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Application Information

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IPC IPC(8): G06F17/50
Inventor 何诚陈小平涂晓东
Owner 成都雷奥风电传感器有限公司
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