Test vector generation method

A technology of test vectors and generation methods, applied in the field of testing, can solve the problems of high test time and cost, failure to give targets, and no theoretical basis, etc., to reduce test time and cost, reduce test cost, and reduce difficulty Effect

A technology of test vectors and generation methods, applied in the field of testing, can solve the problems of high test time and cost, failure to give targets, and no theoretical basis, etc., to reduce test time and cost, reduce test cost, and reduce difficulty Effect

CN1845079AInactive Publication Date: 2006-10-11HUAWEI TECH CO LTD
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  • Test vector generation method
  • Test vector generation method
  • Test vector generation method

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Embodiment Construction

[0032] In order to make the purpose, technical solution and advantages of the present invention clearer, the following examples are given to further describe the present invention in detail.

[0033] Through practice and theoretical analysis, it is unnecessary to test all combinations of various values ​​of various parameters. Through mathematical derivation, there is such a subset of the complete set of all combinations, and the combination of this subset can be To achieve the same effect that can be achieved by using the combination of the complete set, the algorithm for obtaining this subset is the orthogonal array (orthogonal array, OA) algorithm. Orthogonal matrix algorithm balances sampling within the range of factor variation so that each experiment has a strong representativeness.

[0034] The orthogonal matrix algorithm uses "orthogonal tables" to scientifically arrange and analyze multi-factor experiments. Orthogonal table is a special table, which is the basic tool...

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Abstract

The invention relates to a method for generating test vector, which comprises: building an orthogonal table database; according to the test conditions, finding input level values and relative input parameters; selecting the orthogonal tables with same level values, and using highest input level value as the initial present input level value; finding the correct orthogonal table in the orthogonal table group according to present input level value; judging if the met orthogonal table subgroup is found in the orthogonal table group, if it is, judging if present input level value is the lowest level value, if it is, using the orthogonal table with minimum test times as the result to be feedback, or else, continuously searching in the results according to the second lower input level value, or completing the process; then generating test vector according to the result orthogonal table to process test. The invention can reduce the number of vector, the test time and cost, with confirmed effect.

Description

technical field [0001] The invention relates to the field of testing, in particular to a method for generating test vectors in performing ASIC verification or software testing. Background technique [0002] During application-specific basic circuit (ASIC) verification or software testing, various parameters need to be considered. There are many combinations of different values ​​of various parameters, and each combination is called a test vector. Suppose there are 3 parameters A, B, C, and each parameter has 3 values ​​A1, A2, A3; B1, B2, B3; C1, C2, C3, then their combinations are as many as 3 3 = 27 types, that is, there are 27 test vectors. If these 27 test vectors are tested during ASIC verification or software testing, it will consume a lot of resources and time, and the cost of testing is very high. [0003] In the actual test process, it is often encountered that some parameters have a wide range of values. For example, the packet length of an Ethernet packet may a...

Claims

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Application Information

Patent Timeline
11 Oct 2006
Publication
CN1845079A
IPC
G06F11/36
Inventors
ζ˜“ζ•; 程智辉