Integrated circuit, components thereof and manufacturing method

Abstract

The present invention relates to a collector pin and a trench in an integrated circuit intended for high speed communication, and to a manufacturing method for these items. The collector pin is achieved by creating an area which is implantation damaged or made amorphous and at least partially doped (139) by means of ion implantation from an upper silicon surface comprised in a semiconductor structure (144) down to a depth lower than the depth of the surrounding field oxide (120), and that the semiconductor structure (144) is then heat treated. The trench (126) is achieved by uncovering a predetermined area of the upper silicon surface (109a), etching the semiconductor structure (144) within the predetermined area to a predetermined depth, uniformly depositing a first oxide layer (129), preferably of the type LPCVD-TEOS over the semiconductor structure, especially in the trench, uniformly depositing a barrier layer (130), preferably of silicon nitride, over the first oxide layer (129), filling the trench (126) by depositing a silicon layer (134, 135), which is subsequently etched back, over the nitride layer (130), especially in the trench (126), and thermally growing a cap oxide (136) over the trench filling (134).

Description

[0001] The present invention relates to a method for producing, in the manufacturing of an integrated circuit in a bipolar process, a collector pin and a trench for isolating the semiconductor components comprised in the integrated circuit, and to the collector pin, the trench and the integrated circuit. The collector pin, the trench and the integrated circuit are primarily intended for radio applications or other high-speed communication where components with good performance characteristics are required.STATE OF THE ART[0002] Traditionally, when manufacturing integrated circuits, so called LOCOS (Local Oxidation of Silicon) isolation is used in combination with junction isolation, to isolate the components of the integrated circuit; see, for example, J. A. Appels et al, "Local Oxidation of Silicon and its application in Semiconductor Technology,", Philips Res. Rep. vol. 25, 1970, pp. 118-132.[0003] In the manufacturing of bipolar components for RF-IC (Radio Frequency-Integrated Ci...

AI Technical Summary

Benefits of technology

This approach results in a reliable integrated circuit with improved isolation properties and reduced dislocations, enabling higher yield and better performance in high-speed communication applications.

Problems solved by technology

The above described techniques have a number of drawbacks, which have led to a low yield being noticed when using trench isolation, see for example F. Yang et al.

The commonly accepted explanation of the low yield when trench isolation is used is that the trench process (trench etching, sidewall oxidation, filling, re-etching and cap oxidation) introduces defects in the silicon substrate.

Otherwise, according to U.S. Pat. No. 4,983,226, unnecessary mechanical stress, and thereby dislocations, will be created.

U.S. Pat. No. 4,958,213 expresses the opinion that the cap oxidation step creates problems.

The suggestion both involves complicated process techniques and high manufacturing costs, since it requires two filling steps, which are independent, and following planarization.

This may lead to the presence of voids in the filling, see for example FIG. 7, page 577 in R. D. Rung's article.

A problem which has not yet been given attention, is that even an integrated circuit with a trench completely without dislocations may be unreliable, unless a collector pin comprised in the integrated circuit can be made without dislocations.

At ion implantation of the collector pin according to prior art, defects or dislocations are introduced, especially screw dislocations, which may be confined to the area enclosed by the trench.

These defects can then penetrate active p-n junctions, whereby an increased leakage current arises.

In the worst case, such an integrated circuit becomes useless.

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