Circuit and method for improving noise tolerance in multi-threaded memory circuits

Abstract

An embodiment of the invention provides a circuit and method for improving noise tolerance in multi-threaded memory circuits. A PFET is added to the receiving input of each memory cell. The gate of the PFET is connected to the output of the memory cell and the source of the PFET is connected to the control signal of the memory cell. In the case where the dataline is charged near ground and a memory cell, with a high value, is read, and the control signal is high, noise tolerance is improved by the addition of the PFET to the memory cell. The invention does not introduce additional drive fights during writes, when the control signal is low.

Description

FIELD OF THE INVENTION [0001] This invention relates generally to integrated circuit design. More particularly, this invention relates to improving noise tolerance in multi-threaded memory circuits. BACKGROUND OF THE INVENTION [0002] In the context of digital circuits, noise is defined as any deviation of a signal from its stable value in those subintervals of time when it should otherwise be stable. Noise in digital circuits can be attributed to several sources such as leakage noise, charge-sharing noise, cross-talk noise, power supply noise, shot noise, thermal noise, and flicker noise. Rigorous noise analysis and noise considerations during design are becoming increasingly important. [0003] The current capability of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is inversely proportional to a MOSFET's length. As a result, more current may be sourced by an individual MOSFET by reducing the length of the MOSFET. However, as the length of a MOSFET is reduced, other pro...

AI Technical Summary

Benefits of technology

This solution effectively improves noise tolerance in multi-threaded memory circuits by reducing charge-sharing noise and leakage current, ensuring accurate data storage without introducing additional drive conflicts, thus enhancing the reliability of memory cells.

Problems solved by technology

Noise in digital circuits can be attributed to several sources such as leakage noise, charge-sharing noise, cross-talk noise, power supply noise, shot noise, thermal noise, and flicker noise.

Rigorous noise analysis and noise considerations during design are becoming increasingly important.

However, as the length of a MOSFET is reduced, other problems are created.

For example, the threshold voltage may be lowered, resulting in higher levels of leakage current.

In addition, leakage current of a MOSFET may introduce noise into a circuit by leaking charge from a node that would ideally retain its initial charge.

However, unwanted charge-sharing between memory elements may cause correct data stored in a memory element to “flip” to incorrect data.

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