Method of evaluating reticle pattern overlay registration

Abstract

A method for evaluating reticle registration between two reticle patterns. A wafer is defined and etched to form a first exposure pattern, by photolithography with a first reticle having a first reticle pattern thereon. A photoresist layer is formed over the wafer and defined as a second exposure pattern, by photolithography with a second reticle having a second reticle pattern thereon. A deviation value between the first and second exposure patterns is measured by a CD-SEM. The deviation value is calibrated according to the scaling degree and the overlay offset to obtain a registration data. The reticle registration between the two reticle patterns is evaluated based on the registration data.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to semiconductor fabrication, and in particular to a method of checking overlay registration between every two reticle patterns for photolithography. [0003] 2. Description of the Related Art [0004] Each lithography step uses a pattern referred to as a layer, such as a(n) patterned conductive layer, semiconductor layer or insulating layer. In order to make semiconductor devices, each photolithography reticle or mask corresponding to a certain structural pattern must be aligned with the semiconductor substrate for overlay registration before exposure. [0005] Conventionally, corresponding alignment marks or features are set on a semiconductor substrate, i.e. a wafer, and the reticle respectively for alignment. Often alignment marks are included in other layers, as the original alignment marks may be obliterated as processing progresses. It is important for each alignment mark on the wafer ...

AI Technical Summary

Benefits of technology

This method enables precise evaluation of overlay registration between reticle patterns, reducing interference from BARC and providing clearer profiles for accurate measurement, thus improving the accuracy of overlay registration assessment.

Problems solved by technology

However, inherent errors within the reticle pattern 20 cannot be adjusted by the exposure alignment.

For semiconductor devices requiring multi-level alignment, inherent error addition between two continuous or discontinuous layer patterns may exceed the original specification.

The disadvantage of X-SEM sections is they can only show the overlay registration of certain cross-sections of the wafer, not deviations of the alignment in a whole picture.

In addition, when CD-SEM is utilized for inspection, designed to inspect critical dimension (CD) for semiconductor devices, the conventional bottom anti-reflection coating (BARC) widely used for photolithography improvement interferes with the detection signals from CD-SEM, thereby causing difficulty in viewing the overlay registration by CD-SEM

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