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Integrated circuit device with treated perimeter edge

a technology of integrated circuits and perimeter edges, which is applied in the direction of basic electric elements, semiconductor devices, electrical equipment, etc., can solve the problems of complex process and many steps in the fabrication of integrated circuit assemblies, and make the production of functional and flawless circuits more difficul

Inactive Publication Date: 2006-11-23
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention relates to an improved process for manufacturing integrated circuits. The process involves preparing integrated circuit dies for further assembly process steps, including grinding the wafers to prepare them for further assembly. The grinding technique improves the quality of the circuit dies, making them more reliable and suitable for smaller circuit assemblies. The invention addresses the need for smaller and more reliable integrated circuits.

Problems solved by technology

Fabrication of integrated circuit assemblies involves a complicated process including many steps.
The smaller circuits make producing functional and flawless circuits more difficult.

Method used

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  • Integrated circuit device with treated perimeter edge
  • Integrated circuit device with treated perimeter edge
  • Integrated circuit device with treated perimeter edge

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Embodiment Construction

[0013] In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific preferred embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical and electrical changes may be made without departing from the spirit and scope of the present inventions. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present inventions is to be defined only by the appended claims.

[0014] The basic process for fabricating integrated circuits is known in the art and is illustrated in the simple schematic representation of FIG. 1. An ingot of silicon crystal is produced by refining a raw material, such as quartzite, by a ...

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Abstract

An integrated circuit die and method of fabricating the same. The method comprises further grinding, polishing or otherwise treating one or more perimeter edges of an individual circuit die. The perimeter edges are treated to remove a substantial portion of the remaining substrate material layer or scribe therefrom without exposing the active circuitry of the die. The process reduces the overall length and width dimensions of a die producing a smaller circuit die without reducing the amount of circuitry on the die.

Description

RELATED APPLICATIONS [0001] This application is a divisional of U.S. application Ser. No. 09 / 785,006, filed Feb. 16, 2001, which is a continuation of U.S. application Ser. No. 09 / 137,521, filed Aug. 20, 1998, now issued as U.S. Pat. No. 6,215,172, which is division of U.S. application Ser. No. 08 / 795,693, filed Feb. 4, 1997, now issued as U.S. Pat. No. 6,127,245, which applications are incorporated herein by reference.TECHNICAL FIELD OF THE INVENTION [0002] The present invention relates generally to the manufacturing of integrated circuits and in particular the present invention relates to a grinding technique for preparing integrated circuit dies for further assembly process steps. BACKGROUND OF THE INVENTION [0003] Fabrication of integrated circuit assemblies involves a complicated process including many steps. Depending on the desired product, the steps may vary from manufacturer to manufacturer and vary for different types of circuits. The basic process includes producing an ing...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/06H01L21/301
CPCH01L21/02076Y10S438/974H01L29/0657
Inventor SCHOENFELD, AARON
Owner MICRON TECH INC