Chip package and method of fabricating the same

Abstract

A method of fabricating a chip package is provided. A thin metal plate having a first protrusion part, a second protrusion part and a plurality of third protrusion parts are provided. A chip is disposed on the thin metal plate, and a plurality of bonding wires for electrically connecting the chip to the second protrusion part and the second protrusion part to the third protrusion parts is formed. An upper encapsulant and a lower encapsulant are formed on the upper surface and the lower surface of the thin metal plate respectively. The lower encapsulant has a plurality of recesses for exposing a portion of the thin metal plate at locations where the first protrusion part, the second protrusion part and the third protrusion parts are connected to one another. Finally, the thin metal plate is etched by using the lower encapsulant as an etching mask.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of P.R.C. application serial no. 200710087671.6, filed Mar. 13, 2007. All disclosure of the P.R.C. application is incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention generally relates to a chip package, in particular, to a chip package having a lead frame.[0004]2. Description of Related Art[0005]In the semiconductor industry, the fabrication of integrated circuits (IC) can be divided into three major stages: IC design stage, IC process stage and IC package stage.[0006]In the fabrication of IC, the steps of producing a chip include at least wafer fabrication, IC formation and wafer sawing. The wafer has an active surface, in which active elements are formed. After the fabrication of IC in the wafer is completed, a plurality of bonding pads is disposed on the active surface of the wafer so that the chip subsequently cut out from th...

AI Technical Summary

Benefits of technology

[0011]Accordingly, the present invention is directed to a chip package and a method of fabricating the same for resolving the problem of high cost when a patterned lead frame is directly used. The present invention uses a thin metal plate and utilizes etching techniques to form the die pad, the bus bars and the leads of a lead frame on the thin metal plate. As a result, the fabrication cost of the chip package is reduced.

[0012]Furthermore, the etching process of the present invention is performed using a lower encapsulant with recesses therein as an etching mask instead of using a conventional photomask used for exposure and development. Therefore, the cost of fabricating the photomask is saved and hence the cost of fabricating the chip package is reduced.

Problems solved by technology

Because expensive exposure and development masks are required to pattern the lead frame, the cost for fabricating the lead frame is increased.

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