Method of Actively Tagging Electronic Designs and Intellectual Property Cores

Abstract

In an embodiment of the invention, an active security tag is embedded within the digital logic of an electronic design for logic destined for an integrated circuit such as an FPGA. The security tag includes security tag data which permits identification of the electronic design, and facilitates efforts to enforce copyrights in the designs. The security tag also includes a transmitter designed to covertly transmit security tag data to a receiver. Other information, such as error information and status information about the integrated circuit may also be transmitted. The transmitted information is concealed from detection by being hidden within background noise signals or other signals created by normal usage of the integrated circuit.

Description

[0001]This application is a continuation of co-pending U.S. application Ser. No. 11 / 852,205 filed on Sep. 7, 2007, which claims the benefit of United Kingdom Patent Application Serial No. GB 0617697.8, titled “Method of Actively Tagging Electronic Designs and Intellectual Property Cores”, filed Sep. 8, 2006, all of which is fully incorporated herein by reference.FIELD OF THE INVENTION[0002]This invention relates to the labeling and protection of electronic design information, particularly electronic design fragments that are sold as Intellectual Property Cores (IP Cores) to be incorporated in larger customer designs.BACKGROUND OF THE INVENTION[0003]unscrupulous equipment manufacturers may abuse the intellectual property rights of designers by making use of their designs without permission. Examples of such illegal activity include:[0004]1. Copying FPGA bitstream information from a competitor' product and using it to configure the same kind of FPGA in one's own product.[0005]2. When ...

AI Technical Summary

Benefits of technology

This solution reduces the need for costly physical analysis, allows detection of IP Core presence even in encrypted FPGAs, and makes it difficult for unauthorized users to detect and remove the tagging component, providing reliable evidence of IP usage and facilitating version control and failure analysis.

Problems solved by technology

unscrupulous equipment manufacturers may abuse the intellectual property rights of designers by making use of their designs without permission.

A problem faced by owners of such design information, seeking to police abuse of their intellectual property rights, is that it is costly and time consuming to determine whether a particular product does in fact contain the proprietary design fragment.

In the case of FPGA designs where the bitstream is encrypted or programmed into antifuse FPGAs, where the state of the anti-fuses is almost impossible to determine even by microscopic analysis, the difficulty of obtaining evidence of wrongdoing is even greater.

This system is not perfect because chip packages are becoming smaller, which limits the amount of information that can be printed.

Some package materials do not lend themselves to legible printing.

In some cases companies deliberately remove markings or ask for unmarked devices in order to make it difficult for competitors to determine which chips have been used in their system.

At a practical level it can be difficult to decipher the markings on the top of chip packages.

The industry around licensing IP Cores is still relatively young so there has been little work specifically on detecting the use of IP cores within a larger design.

In the case where the bitstream cannot be recovered because it is encrypted or programmed into an antifuse or FLASH based FPGA bitstream, analysis techniques would be useless.

Conventional reverse engineering services which conduct an analysis of the physical interconnects on the integrated circuit are also of no help in the FPGA case, because the IP core design cannot be determined by analysing the mask work of the FPGA it is configured into.

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