Organic electroluminescence display device and manufacturing method therefor

Inactive Publication Date: 2012-02-23
CANON KK
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AI-Extracted Technical Summary

Problems solved by technology

Accordingly, when a tension is applied to the vapor deposition mask, the surface of the insulating layer may be damaged due to a scratch by rubbing.
If the insulating layer is damaged, moisture may easily enter through the damaged part, and hence the emission life may be shortened.
In addition, if the attached matter on the vapor deposition mask enters a light emitting part in the pixel aperture, the organic compound layer formed inside is easily disconnect...
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Method used

[0035]In addition, in the case where a reflective material is used as the material forming the first electrode 13 like this embodiment, because the material forming the first electrode 13 does not exist in the opening 15, it is possible to prevent ambient light reflection from occurring at the region.
[0037]In addition, a recess depth g of the second insulating layer 12 formed in the region overlapping with the opening 15 formed in the first insulating layer 11 is set to a value of at least the thickness of the organic compound layer or larger. Because the recess 17 in the second insulating layer 12 is a recess reflecting the opening 15 formed in the first insulating layer 11, this recess depth g can be adjusted by a combination of the depth d and the width tx of the opening 15 in the first insulating layer 11. Therefore, in FIGS. 3A to 3E, the opening 15 passes through the first insulating layer 11, but not necessarily, and may be a recess. For instance, as illustrated in FIG. 4 which shows a cross sectional structure, taken along A-A of FIG. 2, the depth d of the opening 15 may be set to approximately a half of the first insulating layer 11. In order to form the opening 15 having a predetermined depth in the first insulating layer 11 using the positive photosensitive resist, for example, there is a method of decreasing an exposure opening space of a photomask 18 so as to reduce the irradiation amount to be relatively smaller than that in the case of forming the opening 15 in a passed-through manner, to thereby adjust the depth that can be soluble in development liquid.
[0048]Even in the pressed state, in the manufacturing method of the organic EL display device according to this embodiment, because the second insulating layer 12 has the recesses 17, the contact area between the second insulating layer 12 and the vapor deposition mask 19 can be reduced. Therefore, it is possible to suppress an influence that the second insulating layer 12 is damaged by the foreign substance adhered to the vapor deposition mask 19.
[0053]According to the organic EL display device and the manufacturing method ...
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Benefits of technology

[0009]Therefore, an object of the present invention is to provide an organic EL display device and a manufacturing method therefor, which are capable of reducing a contact area between a vapor deposition mask and...
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Abstract

Provided is an organic eletroluminescence display device, which is capable of preventing transfer of an attached matter from the vapor deposition mask to the insulating layer, without increasing steps or manufacturing cost. The organic eletroluminescence display device includes: a first insulating layer formed on a substrate; multiple first electrodes disposed on the first insulating layer; an opening formed in the first insulating layer at a periphery of the first electrode; a second insulating layer disposed in a region overlapping with the opening; an organic compound layer covering the first electrodes; and a second electrode formed on the organic compound layer, in which: a material forming the first electrodes is absent in the opening; and the second insulating layer has a recess formed in a surface thereof, reflecting the opening of the first insulating layer, the recess being formed in a vertical direction of the substrate surface.

Application Domain

Technology Topic

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  • Organic electroluminescence display device and manufacturing method therefor
  • Organic electroluminescence display device and manufacturing method therefor
  • Organic electroluminescence display device and manufacturing method therefor

Examples

  • Experimental program(3)

Example

Example 1
[0062]With reference to FIGS. 1A and 1B, 2, and 3A to 3E, a manufacturing method for the organic EL display device according to Example 1 is described. FIG. 1A schematically illustrates a cross sectional structure of one pixel region, and illustrates a state where the hole transport layer 22 is formed to have the same thickness in all pixels. When multiple pixels having the cross sectional structure illustrated in FIG. 1A are arranged in matrix, a display region of the organic EL display device is constituted. In addition, three sub-pixels including p1, p2 and p3 are arranged in parallel in one pixel region. Note that, the organic EL display device described here has a pixel pitch of 191 μm and a sub-pixel size of 64 μm×191 μm.
[0063]As illustrated in FIGS. 1A and 3A, transistors are formed correspondingly to individual sub-pixels on the substrate 10. Note that, in FIGS. 1A and 1B, only gate lines 25 of the transistors, the gate insulating layer 26, and a passivation layer (insulating layer) 27 are illustrated. In order to flatten unevenness of the substrate 10, the first insulating layer 11 is first formed on the substrate. Next, as illustrated in FIG. 3B, the linear openings 15 having a width tx are formed between the first electrodes 13 and 13 of the individual sub-pixels p1, p2 and p3 in the first insulating layer 11. Here, the thickness of the first insulating layer 11 is set to 2 μm so that unevenness of the substrate can be sufficiently flattened. The depth d of the opening 15 is set to 2 μm, and the width tx of the opening 15 is set to 20 μm. Note that, the plane structure of the openings 15 formed in the first insulating layer 11 is as illustrated in FIG. 2.
[0064]The first insulating layer 11 described above is formed by applying a positive photosensitive resist containing polyimide using the spin coating method, irradiating regions to remove with exposing light, and performing a developing step and a baking step after that. Here, the regions to remove correspond to the openings 15, the contact holes 16 for electrically connecting the drain electrodes of the transistors to the first electrodes 13, and lead-out terminal portions (not shown) outside the display region.
[0065]Next, as illustrated in FIG. 3C, the material for forming the first electrode 13 is deposited on the entire surface of the first insulating layer 11. Here, a conductive oxide material containing indium tin oxide (ITO) is deposited by the sputtering method as an adhering layer to have a thickness of approximately 20 nm. On the ITO layer, a silver alloy is deposited by the sputtering method to have a thickness of approximately 100 nm. Further, on the silver alloy film, ITO is deposited by the sputtering method to have a thickness of approximately 10 nm. After that, as illustrated in FIG. 3D, a pattern of the multiple first electrodes 13 corresponding to individual pixels is formed by etching using the mask that is the resist pattern formed by usual photolithography.
[0066]After that, in order to form the second insulating layer 12, the positive photosensitive resist containing polyimide is applied by the spin coating method onto the substrate on which the first electrodes 13 are formed, and the predetermined regions to remove are irradiated with exposing light. Here, the second insulating layer 12 having pixel apertures that exposes the first electrodes 13 and covers ends of the first electrodes 13 is formed. This second insulating layer 12 is formed by the same process as the first insulating layer 11 described above, except for an exposure region.
[0067]Thus, as illustrated in FIG. 3E, the second insulating layer 12 formed to enclose the perimeters of the first electrodes 13 includes the linear recesses 17 reflecting the openings 15 formed between neighboring first electrodes 13 and 13 in the first insulating layer 11. Here, the second insulating layer 12 is formed to have a thickness of 2 μm, a width Wx of 25 μm, a recess width cx of 18 μm, and a recess depth g of approximately 1 μm. Note that, the second insulating layer 12 has a width Wy of 15 μm. Note that, S1 and S2 which are formed in the insulating layer 12 and which are regions in which height of the recesses are made high each have a width of 1 μm.
[0068]As illustrated in FIG. 1A, the hole transport layer 22 having a thickness of approximately 80 nm is formed on the entire surface of the display region on the substrate 10 described above by the vacuum deposition method. After that, the color emission layers are formed in the sub-pixels of red, green, and blue colors, respectively. As illustrated in FIG. 1B, when the vapor deposition of the emission layer is performed in the sub-pixel p2, the vapor deposition mask 19 having the opening portion for exposing the first electrode 13 of the sub-pixel p2 is brought into contact with the hole transport layer 22 deposited on the surface (protrusion) of the second insulating layer 12.
[0069]Note that, at the recess 17 in the second insulating layer 12, because the recess 17 has the depth g (1 μm) that is sufficiently larger than the thickness (80 nm) of the hole transport layer 22, the vapor deposition mask 19 is not brought into contact with the hole transport layer 22.
[0070]In this way, an evaporated substance 23 is deposited through the opening portion of the vapor deposition mask 19 so as to cover the first electrode 13 of the sub-pixel p2, and hence the emission layer 24 is formed and patterned. Note that, the contact area between the vapor deposition mask 19 and the hole transport layer 22 on the second insulating layer 12 can be reduced by approximately 30% with respect to the case where the recesses 17 are not formed.
[0071]Other emission layer patterns of the sub-pixels p1 and p2 are also formed using the vapor deposition mask 19 in the same manner. After that, the electron transport layer and the electron injection layer are formed as common layers successively in the individual vacuum chambers.
[0072]The process after that has the same procedure as the manufacturing method of the ordinary organic EL display device. Although illustration is omitted, for example, a transparent conductive layer made of a translucent Ag alloy thin film and IZO is laminated on the organic compound layer, to thereby form the second electrode. Next, a protection film made of silicon nitride is formed on the transparent conductive layer. Next, a thermosetting resin is applied onto the protection film and a perimeter of the substrate. A substrate made of glass, for example, is adhered onto the resin, so as to seal by heating.
[0073]According to the manufacturing method described above, it is possible to obtain the top emission organic EL display device, which reflects the light generated in the emission layer of the organic compound layers by the surface of the first electrode 11 including the Ag alloy film, and outputs the light through the second electrode 12 constituted of layers including the translucent Ag alloy thin film.
[0074]According to the organic EL display device and the manufacturing method therefor according to Example 1, the opening 15 having a depth of 2 μm and a width of 20 μm 12 is formed between neighboring first electrodes in the first insulating layer 11, and the second insulating layer 12 is formed so as to surround the first electrode 13 while including the region overlapping with the opening 15. Further, the surface of the second insulating layer 12 that is brought into contact with the vapor deposition mask 19 includes the recesses 17 having a depth of 1 μm in the vertical direction of the substrate and a width of 18 μm. Thus, the contact area between the vapor deposition mask 19 and the hole transport layer 22 on the second insulating layer 12 can be reduced by approximately 30% compared with the case where the recesses 17 are not formed.
[0075]The number of pixel defects due to abrasion or scratch on the second insulating layer 12 was compared between the case where the recesses were not formed in the second insulating layer 12 as a comparative example and the case where the recesses 17 were formed as Example 1. As a result, the number of pixel defects could be reduced by approximately 20% in Example 1.

Example

Example 2
[0076]With reference to FIG. 7, a manufacturing method for an organic EL display device according to Example 2 is described. FIG. 7 illustrates a process of forming the emission layer in the sub-pixel. Note that, the substrate described in this example has a size of 60 mm×460 mm×0.5 mmt, and 5×5 panel regions are disposed. In each panel region, the structure of the transistor, the first insulating layer 11, the first electrode 13, and the second insulating layer 12 formed on the substrate 10 is the same as in Example 1.
[0077]As illustrated in FIG. 7, when the vapor deposition of the emission layer is performed, the vapor deposition mask 19 having the opening that exposes the first electrode 13 in the sub-pixel p2 is positioned so as to contact with the hole transport layer 22 deposited on the surface of the second insulating layer 12. Particularly in this example, after positioning the substrate with respect to the vapor deposition mask 19, the substrate is pressed to the vapor deposition mask 19 by an urging force of the spring load structure 30 disposed on the backside of the substrate, and under this state, the emission layer 24 is formed. Note that, the number of points of the spring load is set to 50 in the substrate surface, and a load at each point is set to 10 g.
[0078]According to the organic EL display device manufactured by the same method as in Example 1 except for the above description, the contact area between the vapor deposition mask 19 and the hole transport layer 22 on the second insulating layer 12 can be reduced similarly to Example 1. In addition, it is possible to maintain the relative position and the contact state between the substrate and the vapor deposition mask 19 to be stable during the period after the vapor deposition mask 19 is positioned with respect to the substrate until the vapor deposition of the emission layer is finished.
[0079]The number of pixel defects due to abrasion or scratch on the second insulating layer 12 when the above-mentioned load was applied to the substrate backside was compared between the case where the recesses were not formed in the second insulating layer 12 as a comparative example and the case where the recesses 17 were formed as Example 2. As a result, the number of pixel defects could be reduced by approximately 20% in this example. In addition, good mask vapor deposition accuracy of ±10 μm or smaller could be achieved in all of 5×5 panel regions in the substrate.

Example

Example 3
[0080]With reference to FIG. 8B, a manufacturing method for an organic EL display device according to Example 3 is described. FIG. 8B schematically illustrates a plane structure of a 3×2 sub-pixel region, and multiple sub-pixel regions are disposed in matrix so that the display region of the organic EL display device is constituted.
[0081]The second insulating layer 12 illustrated in FIG. 8B is formed so as to have the recesses 17 reflecting the openings 15 by forming the grating-like openings 15 in the peripheries of the first electrodes 13 in the first insulating layer 11. The grating-like opening 15 is formed to communicate to the contact hole 16 that can electrically connect the first electrode 13 to the drain electrode of the transistor.
[0082]The opening 15 having a depth of 2 μm and a width of 20 μm is formed in the first insulating layer 11 between the first electrodes neighboring in an X direction in FIG. 8B, and the second insulating layer 12 is formed to surround the first electrode 13 while including the region overlapping with the opening 15. Thus, the surface of the second insulating layer 12 contacting with the vapor deposition mask 19 has the recesses 17 having a depth of 1 μm in the vertical direction of the substrate and a width Cx of 18 μm. In addition, the opening 15 having a depth of 2 μm and a width of 10 μm is formed in the first insulating layer 11 between the first electrodes neighboring in a Y direction in FIG. 8B, and the second insulating layer 12 is formed to surround the first electrode 13 while including the region overlapping with the opening 15. Thus, the surface of the second insulating layer 12 contacting with the vapor deposition mask 19 has the recesses 17 having a depth of 1 μm in the vertical direction of the substrate and a width Cy of 12 μm. Note that, the second insulating layer 12 has a thickness of 2 μm.
[0083]According to the organic EL display device manufactured by the same method as in Example 1 except for the above description, the contact area between the vapor deposition mask 19 and the hole transport layer 22 on the second insulating layer 12 can be reduced by approximately 60% compared with the case where the recesses are not formed.
[0084]The number of pixel defects due to abrasion or scratch on the second insulating layer 12 was compared between the case where the recesses were not formed in the second insulating layer 12 as a comparative example and the case where the recesses 17 were formed as Example 3. As a result, the number of pixel defects could be reduced by approximately 50% in this example.
[0085]While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
[0086]This application claims the benefit of Japanese Patent Application No. 2010-183874, filed Aug. 19, 2010, which is hereby incorporated by reference herein in its entirety.
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