Multi-Channel Scalable EEG Acquisition System on a Chip with Integrated Patient Specific Seizure Classification and Recording Processor

a seizure classification and recording processor technology, applied in the field of vital signs monitoring, can solve the problems of device data transmission and off-chip failure, and achieve the effect of improving the accuracy of data acquisition

Inactive Publication Date: 2015-02-05
MASSACHUSETTS INST OF TECH +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0011]In yet another aspect, the invention relates to a CS-CCIA. In one embodiment, the CS-CCIA includes: an input-chopped switch having an input in communication with a signal source and having an output; a low noise amplifier having an input in communication with the output of the input-chopped switch and an first output connected to an input of the ASPU and having a second output; an Impedance Boosting Loop including a IBL chopper switch having an input in communication with the low noise amplifier output and an output in communication with the low noise amplifier input; a DC Servo Loop including: a DSL amplifier having an input in communication with the output of the low noise amplifier; a DSL chopper switch having an input in communication with the output of the DSL amplifier and a output in communication with the input of the low noise amplifier; and an Offset Cancellation Loop including: an OCL amplifier having an input in communication with the second output of the low noise amplifier and having an output; an OCL chopped switch having an input in communication with the output of the OCL amplifier and having an output; a high pass filter having an input in communication with the output of the OCL chopped switch and having an output; and an gain chopped switch having an input in communication with the output of the high pass filter and having an output in communication with the input of the low noise amplifier. In another embodiment, the Impedance Boosting Loop comprises a IBL chopper switch having an input in communication with the low noise amplifier output and an output in communication with the low noise amplifier input. In yet another embodiment, the DC Servo Loop includes: a DSL amplifier having an input in communication with the output of the low noise amplifier; a DSL chopper switch having an input in communication with the output of the DSL amplifier and an output in communication with the input of the low noise amplifier. In yet another embodiment, the Offset Cancellation Loop comprises: an OCL amplifier having an input in communication with the second output of the low noise amplifier and having an output; an OCL chopped switch having an input in communication with the output of the OCL amplifier and having an output; a high pass filter having an input in communication with the output of the OCL chopped switch and having an output; and an gain chopped switch having an input in communication with the output of the high pass filter and having an output in communication with the input of the low noise amplif

Problems solved by technology

Technical challenges arise from 1) patient-to-patient variation of a seizure pattern on EEG, 2) fully integrating ultra-low power variable dynamic range instrumentation circuits with a s

Method used

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  • Multi-Channel Scalable EEG Acquisition System on a Chip with Integrated Patient Specific Seizure Classification and Recording Processor
  • Multi-Channel Scalable EEG Acquisition System on a Chip with Integrated Patient Specific Seizure Classification and Recording Processor
  • Multi-Channel Scalable EEG Acquisition System on a Chip with Integrated Patient Specific Seizure Classification and Recording Processor

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Embodiment Construction

[0027]In brief overview, FIG. 1 discloses a block diagram of an embodiment of the scalable EEG SoC 10 constructed as interconnected integrated circuit cells (generally “cells”) in accordance with the invention. This embodiment includes eight Analog Front-End processor cells (collectively 19). Two electrodes, configured as a differential pair, connect to one Analog-Front-End to form one channel. The eight Analog Front-End cells accommodate a total of 16 electrodes. Each Analog Front-End 19 cell includes a continuous-time Chopper Stabilized-Capacitive Coupled Instrumentation Amplifier (CS-CCIA) 14, an AFE Channel Controller 16, and a digitally-assisted reconfigurable Analog Signal Processing Unit (ASPU) 18. Each Analog Front-End cell 19 is connected to a respective input of a multiplexer cell 20. The output terminal of the multiplexer 20 is connected to the input of a ten bit SAR ADC cell 22 digitizing at a rate of 4K samples / sec / channel and whose output value is an input value to a p...

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Abstract

An integrated circuit chip and method for EEG monitoring. In one embodiment, the integrated circuit chip includes an Analog Front End cell in communication with an electrode and a Classification Processor wherein a signal received from the electrode is processed by the Classification Engine cell and designated as seizure or non-seizure. In another embodiment, the Analog Front End cell includes an amplifier cell in communication with an electrode; and an ASPU cell in communication with the amplifier cell. In yet another embodiment, the Classification Processor includes a DBE Channel Controller cell; a Feature Extraction Engine Processor cell, and a Classification Engine cell in communication with the Feature Extraction Engine Processor cells and the DBE Channel Controller cell.

Description

RELATED APPLICATIONS[0001]This application claims priority to U.S. Provisional Patent Application 61 / 600,369 filed Feb. 17, 2012, the contents of which are herein incorporated by reference in their entirety.FIELD OF THE INVENTION[0002]The invention relates generally to the field of vital signs monitoring and specifically to the field of EEG monitoring.BACKGROUND OF THE INVENTION[0003]Tracking seizure activity in order to provide proper medication requires a device having a small form factor, and ultra-low power sensors with continuous EEG classification. Technical challenges arise from 1) patient-to-patient variation of a seizure pattern on EEG, 2) fully integrating ultra-low power variable dynamic range instrumentation circuits with a seizure detection processor, and 3) reducing communication overhead. One prior device extracted EEG features locally on-chip to reduce the data being transmitted, and saved power by 1 / 14 when compared to raw EEG data transmission. However, that device...

Claims

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Application Information

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IPC IPC(8): A61B5/04H03H17/02H03F3/387A61B5/0476A61B5/00
CPCA61B5/04012A61B5/0476A61B5/4094H03F2200/375H03H17/0248H03H17/0226H03F2200/294H03F3/387A61B2562/166A61B5/369A61B5/316
Inventor YOO, JERALDCHANDRAKASAN, ANANTHA P.YAN, LONGEL-DAMAK, DINA REDASHOEB, ALI HOSSAMBIN ALTAF, MUHAMMAD AWAIS
Owner MASSACHUSETTS INST OF TECH
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